High-level synthesis (HLS) is increasingly popular for the design of high-performance and
energy-efficient heterogeneous systems, shortening time-to-market and addressing today's …

High-level synthesis (HLS) tools generate register-transfer level (RTL) hardware
descriptions from behavioral-level specifications through resource allocation, scheduling …

Code motion and speculations are usually exploited in the High Level Synthesis of control
dominated applications to improve the performances of the synthesized designs. Selecting …

High level synthesis (HLS) quality improvements have led to its increased adoption in
hardware design. In the design flow, IP reuse is critical for achieving quality of results, yet …

Performance optimization is an important goal for High-level Synthesis (HLS). Existing HLS
scheduling algorithms are all based on Control and Data Flow Graph (CDFG) and will …

In this paper, an approach to synthesize compressor trees in high-level synthesis is
proposed. We target the modern field-programmable gate arrays, which integrate carry …

High Efficiency Video Coding (HEVC) is state-of-the-art video coding standard. Emerging
applications like free-viewpoint video, 360degree video, augmented reality, 3D movies etc …

As the complexity of applications continues to grow to meet user demands, the complexity of
hardware platforms continues to grow correspondingly. Thus, the hardware design flow is a …