Stochastic TDC Using Common-Mode Time Dithering and Passive Approximate Adders
The stochastic time-to-digital converter (STDC) presents a novel approach to automating the
design and implementation process, delivering high performance with strong resilience to …
design and implementation process, delivering high performance with strong resilience to …
Cross-Domain Optimization of Low-Power Mixed-Signal Sensor Systems Under Classification Accuracy Constraints
Optimizing mixed-signal systems-on-chips (SoCs) is a challenging task, especially when
they involve both analog building blocks and machine-learning (ML) algorithms which make …
they involve both analog building blocks and machine-learning (ML) algorithms which make …
Differentiable Neural Network Surrogate Models for gm/ID-based Analog IC Sizing Optimization
Y Uhlmann, T Moldenhauer… - 2023 ACM/IEEE 5th …, 2023 - ieeexplore.ieee.org
Analog integrated circuit sizing still relies heavily on human expert knowledge as previous
automation approaches have not found wide-spread acceptance in industry. One strand, the …
automation approaches have not found wide-spread acceptance in industry. One strand, the …
AI-Assisted Design Automation of Circular and Asymmetric Inductor in CMOS Technology
JW Hyun, D Kim, KS Choi… - 2024 21st International …, 2024 - ieeexplore.ieee.org
This paper presents a methodology of the automated inductor generator for radio-frequency
(RF) integrated circuit. We propose a machine learning assisted parameterized-cell (PCELL) …
(RF) integrated circuit. We propose a machine learning assisted parameterized-cell (PCELL) …