[图书][B] Asynchronous circuit design

CJ Myers - 2001 - books.google.com
With asynchronous circuit design becoming a powerful tool in the development of new
digital systems, circuit designers are expected to have asynchronous design skills and be …

[PDF][PDF] An introduction to asynchronous circuit design

A Davis, SM Nowick - The Encyclopedia of Computer Science and …, 1997 - Citeseer
The purpose of this monograph is to provide both an introduction to eld of asynchronous
digital circuit design and an overview of the practical state of the art in 1997. In the early …

[图书][B] Computer-aided synthesis and verification of gate-level timed circuits

CJ Myers - 1996 - search.proquest.com
In recent years, there has been a resurgence of interest in the design of asynchronous
circuits due to their ability to eliminate clock skew problems, achieve average case …

Verification of timed systems using POSETs

W Belluomini, CJ Myers - … Conference, CAV'98 Vancouver, BC, Canada …, 1998 - Springer
This paper presents a new algorithm for efficiently verifying timed systems. The new
algorithm represents timing information using geometric regions and explores the timed …

Logic decomposition of speed-independent circuits

A Kondratyev, J Cortadella, M Kishinevsky… - Proceedings of the …, 1999 - ieeexplore.ieee.org
Logic decomposition is a well-known problem in logic synthesis, but it poses new
challenges when targeted to speed-independent circuits. The decomposition of a gate into …

Asynchronous circuit synthesis by direct mapping: Interfacing to environment

A Bystrov, A Yakovlev - Proceedings Eighth International …, 2002 - ieeexplore.ieee.org
Direct mapping helps avoid algorithmic complexity which is inherent in logic synthesis
methods. However, existing techniques for direct mapping of Petri net specifications to …

A structural encoding technique for the synthesis of asynchronous circuits

J Carmona, J Cortadella, E Pastor - Fundamenta Informaticae, 2002 - content.iospress.com
This paper presents a method for the automatic synthesis of asynchronous circuits from Petri
net specifications. The method is based on a structural encoding of the system in such a way …

Timed state space exploration using posets

W Belluomini, CJ Myers - IEEE Transactions on Computer …, 2000 - ieeexplore.ieee.org
This paper presents a new timing analysis algorithm for efficient state space exploration
during the synthesis of timed circuits or the verification of timed systems. The source of the …

Efficient timing analysis algorithms for timed state space exploration

W Belluomini, CJ Myers - Proceedings Third International …, 1997 - ieeexplore.ieee.org
This paper presents new timing analysis algorithms for efficient state space exploration
during timed circuit synthesis. Timed circuits are a class of asynchronous circuits that …

[图书][B] Encyclopedia of Computer Science and Technology: Volume 38-Supplement 23: Algorithms for Designing Multimedia Storage Servers to Models and …

A Kent, JG Williams - 2021 - taylorfrancis.com
Volume 38-Supplement 23: Algorithms for Designing Multimedia Storage Servers to Models
and Architectures. Covering more than basic computer commands and procedures, this …