The occurrence of congestion in on-chip networks can severely degrade the performance
due to increased message latency. In mesh topology, minimal methods can propagate …

While Networks-on-Chip (NoC) have been increasing in popularity with industry and
academia, it is threatened by the decreasing reliability of aggressively scaled transistors. In …

Traditional methods in 3D NoCs simply use a deterministic routing algorithm to deliver
packets from a source to a destination node. However, deterministic methods are unable to …

There are many fault-tolerant approaches presented both in off-chip and on-chip networks.
Regardless of all varieties, there has always been a common assumption between them …

The communication requirements of many-core embedded systems are convened by the
emerging Network-on-Chip (NoC) paradigm. As on-chip communication reliability is a …

Networks-on-Chip (NoCs) has become a promising approach for the on-chip communication
infrastructure of many-core Systems-on-Chip (SoCs). Faults may occur in the NoC both at …

While Networks-on-Chip have been increasing in popularity with industry and academia, it is
threatened by the decreasing reliability of aggressively scaled transistors. This level of …

This paper proposes a novel QoS-aware and congestion-aware Network-on-Chip
architecture that not only enables quality-oriented network transmission and maintains a …

In this paper, we propose a congestion-aware routing algorithm based on Dual
Reinforcement Q-routing. In this method, local and global congestion information of the …

Network-on-Chip (NoC) is considered as a scalable interconnect medium for Multiprocessor
System-on-Chip (MPSoC) due to its ability to provide high bandwidth and low latency …