A comprehensive review on FinFET in terms of its device structure and performance matrices
The revolutions made in the CMOS technology are brought up by, continuous downscaling
in order to obtain higher density, better performance and low power consumption, causing …
in order to obtain higher density, better performance and low power consumption, causing …
Strategic review on different materials for FinFET structure performance optimization
KB Madhavi, SL Tripathi - IOP Conference Series: Materials …, 2020 - iopscience.iop.org
In this paper, the strategic review of different materials that are used in FinFET structure is
studied. This is achieved by using carefully designed source/drain spacers and doped …
studied. This is achieved by using carefully designed source/drain spacers and doped …
Robustness evaluation of electrical characteristics of sub-22 nm FinFETs affected by physical variability
BM Kalasapati, SL Tripathi - Materials Today: Proceedings, 2022 - Elsevier
The physical parameters of digital devices have been affected by process variability The
paper is focused on subthreshold performance characterization of FET with Visual TCAD …
paper is focused on subthreshold performance characterization of FET with Visual TCAD …
Comparative study on random interface traps-induced reliability of NC-FinFETs and FinFETs
W Lü, C Zhang, D Chen, Y Han, W Wei - Silicon, 2023 - Springer
Fin-type field-effect transistors (FinFETs) are vulnerable to the random interface trap (RIT)-
induced reliability issue caused by the bias temperature instability and hot carrier injection …
induced reliability issue caused by the bias temperature instability and hot carrier injection …
Analysis on the impact of interface Trap distributions on SOI DMG FinFETs: Overlap/underlap configurations
R Chaudhary, R Saha - Micro and Nanostructures, 2024 - Elsevier
This paper investigates the significance of interface trap charges (ITCs) distribution by
introducing localized charges (donor/acceptor) at the interface of semiconductor/insulator on …
introducing localized charges (donor/acceptor) at the interface of semiconductor/insulator on …
Physical insights of interface traps and self-heating effect on electrical response of DMG FinFETs in overlap and underlap configurations: analog/RF perspective
R Chaudhary, R Saha - Physica Scripta, 2023 - iopscience.iop.org
This paper presents a thorough analysis on analog/RF parameters including interface trap
charges (ITCs) of two different densities of states (DOS) along with self-heating on the …
charges (ITCs) of two different densities of states (DOS) along with self-heating on the …
Impact of interface trap charge on analog/rf parameters of novel heterogeneous gate dielectric tri-metal gate finfet
S Saraswat, DS Yadav - 2021 International Conference on …, 2021 - ieeexplore.ieee.org
In this script, an innovative structure is introduced to optimize TMG FinFET by employing
dielectric material engineering. In this method, HfO 2 is placed towards the source side, with …
dielectric material engineering. In this method, HfO 2 is placed towards the source side, with …
Analytical modeling of random discrete traps induced threshold voltage fluctuations in double-gate MOSFET with HfO2/SiO2 gate dielectric stack
An analytical model of threshold voltage fluctuations due to random discrete traps at Si/SiO 2
interface and in gate oxide regions for undoped double-gate (DG) MOSFET with high-k/SiO …
interface and in gate oxide regions for undoped double-gate (DG) MOSFET with high-k/SiO …