Semiconductor plug protected by protective dielectric layer in three-dimensional memory device and method for forming the same

Y Haohao, Y Zhang, E Wang, RF Zhang… - US Patent …, 2020 - Google Patents
Embodiments of 3D memory devices with a semiconductor plug protected by a dielectric
layer and methods for forming the same are disclosed. In an example, a 3D memory device …

Apparatus including multiple channel materials, and related methods, memory devices, and electronic systems

A Goda, M Aoulaiche - US Patent 11,404,583, 2022 - Google Patents
An apparatus comprises a stack comprising an alternating sequence of dielectric structures
and conductive structures, a first channel material extending vertically through the stack, and …

Method for fabricating a semiconductor device

JK Jeong, YH Song, CH Choi, HJ Seul - US Patent 11,942,553, 2024 - Google Patents
The semiconductor device includes a substrate, a stack structure including gate patterns and
interlayer insulating films that are alternately stacked on the substrate, an insulating pillar …

Wrap-around-contact for 2D-channel gate-all-around field-effect-transistors

J Frougier, R Xie, K Cheng, C Park, A Gaul - US Patent 11,935,930, 2024 - Google Patents
Embodiments herein describe FETs with channels that form wrap-around contacts (a female
portion of a female/male connection) with metal contacts (a male portion of the female/male …

Thin film transistor and vertical non-volatile memory device including transition metal-induced polycrystalline metal oxide channel layer

JK Jeong, YH Song, CH Choi, HJ Seul - US Patent App. 18/586,255, 2024 - Google Patents
RKTYLMNFRDHKIL-UHFFFAOYSA-N copper; 5, 10, 15, 20-tetraphenylporphyrin-22, 24-
diide Chemical compound [Cu+2]. C1= CC (C (= C2C= CC ([N-] 2)= C (C= 2C= CC= CC= 2) …

Apparatuses including multiple channel materials within a tier stack

A Goda, M Aoulaiche - US Patent 12,132,116, 2024 - Google Patents
An apparatus comprises a stack comprising an alternating sequence of dielectric structures
and conductive structures, a first channel material extending vertically through the stack, and …

Microelectronic devices with dopant extensions near a GIDL region below a tier stack, and related methods and systems

A Fayrushin, H Liu, CM Carlson - US Patent 11,974,430, 2024 - Google Patents
A microelectronic device includes a stack structure comprising a vertically alternating
sequence of insulative structures and conductive structures arranged in tiers. At least one …

Electronic devices comprising a dielectric material, and related systems and methods

MA Lindemann, C Howder, Y Fukuzumi… - US Patent …, 2024 - Google Patents
Electronic devices comprising a doped dielectric material adjacent to a source contact, tiers
of alternating conductive materials and dielectric materials adjacent to the doped dielectric …

Memory arrays comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells

JD Hopkins, DA Clampitt, MJ Puett… - US Patent 11,889,683, 2024 - Google Patents
A method used in forming a memory array comprising strings of memory cells comprises
forming a stack comprising vertically-alternating first tiers and second tiers. A channel …

Semiconductor memory device

F Arai, K Hosotani, N Momo - US Patent 11,074,944, 2021 - Google Patents
According to one embodiment, a semiconductor memory device includes: first to fifth
interconnects; a semiconductor layer having one end located between the fourth …