Linear-time algorithms for dominators and other path-evaluation problems

AL Buchsbaum, L Georgiadis, H Kaplan, A Rogers… - SIAM Journal on …, 2008 - SIAM
We present linear-time algorithms for the classic problem of finding dominators in a
flowgraph, and for several other problems whose solutions require evaluating a function …

Finding dominators in practice

L Georgiadis, R Tarjan, R Werneck - Journal of Graph Algorithms and …, 2006 - jgaa.info
The computation of dominators in a flowgraph has applications in several areas, including
program optimization, circuit testing, and theoretical biology. Lengauer and Tarjan [] …

Fault equivalence and diagnostic test generation using ATPG

A Veneris, R Chang, MS Abadir… - 2004 IEEE International …, 2004 - ieeexplore.ieee.org
Fault equivalence is an essential concept in digital design with significance in fault
diagnosis, diagnostic test generation, testability analysis and logic synthesis. In this paper …

[HTML][HTML] Finding dominators via disjoint set union

W Fraczak, L Georgiadis, A Miller, RE Tarjan - Journal of Discrete …, 2013 - Elsevier
The problem of finding dominators in a directed graph has many important applications,
notably in global optimization of computer code. Although linear and near-linear-time …

Diagnostic test generation for arbitrary faults

NK Bhatti, RD Blanton - 2006 IEEE International Test …, 2006 - ieeexplore.ieee.org
It is now generally accepted that the stuck-at fault model is no longer sufficient for many
manufacturing test activities. Consequently, diagnostic test pattern generation based solely …

Dominator tree certification and divergent spanning trees

L Georgiadis, RE Tarjan - ACM Transactions on Algorithms (TALG), 2015 - dl.acm.org
How does one verify that the output of a complicated program is correct? One can formally
prove that the program is correct, but this may be beyond the power of existing methods …

Diagnostic and detection fault collapsing for multiple output circuits

RKKR Sandireddy, VD Agrawal - Design, Automation and Test …, 2005 - ieeexplore.ieee.org
We discuss fault equivalence and dominance relations for multiple output combinational
circuits. The conventional definition for equivalence says that" two faults are equivalent if …

Planar reachability under single vertex or edge failures

GF Italiano, A Karczmarz, N Parotsidis - Proceedings of the 2021 ACM-SIAM …, 2021 - SIAM
In this paper we present an efficient reachability oracle under single-edge or single-vertex
failures for planar directed graphs. Specifically, we show that a planar digraph G can be …

[PDF][PDF] Dominator tree verification and vertex-disjoint paths

L Georgiadis, RE Tarjan - SODA, 2005 - Citeseer
We present a linear-time algorithm that given a flowgraph G=(V, A, r) and a tree T, checks
whether T is the dominator tree of G. Also we prove that there exist two spanning trees of G …

Finding dominators in practice

L Georgiadis, RF Werneck, RE Tarjan… - Algorithms–ESA 2004 …, 2004 - Springer
The computation of dominators in a flowgraph has applications in program optimization,
circuit testing, and other areas. Lengauer and Tarjan [17] proposed two versions of a fast …