Runtime dependency analysis for loop pipelining in high-level synthesis

M Alle, A Morvan, S Derrien - Proceedings of the 50th Annual Design …, 2013 - dl.acm.org
Research on High-Level Synthesis has mainly focused on applications with statically
determinable characteristics and current tools often perform poorly in presence of data …

Vfc: The vienna fortran compiler

S Benkner - Scientific Programming, 1999 - content.iospress.com
Abstract High Performance Fortran (HPF) offers an attractive high‐level language interface
for programming scalable parallel architectures providing the user with directives for the …

Source-to-source code translator: OpenMP C to CUDA

G Noaje, C Jaillet, M Krajecki - 2011 IEEE International …, 2011 - ieeexplore.ieee.org
In recent years hardware accelerators have become a full part of the HPC domain as their
peak performance has increased steadily. Although their programmability has greatly …

Fuzzy clustering methods in data mining: A comparative case analysis

G Raju, B Thomas, S Tobgay… - … Conference on advanced …, 2008 - ieeexplore.ieee.org
The conventional clustering algorithms in data mining like k-means algorithm have
difficulties in handling the challenges posed by the collection of natural data which is often …

Identifying pitfalls in automatic parallelization of NAS parallel benchmarks

S Prema, R Jehadeesan… - … National Conference on …, 2017 - ieeexplore.ieee.org
This paper provides an examination of OpenMP based auto-parallelizers and their
limitations encountered during parallelization of NAS parallel benchmarks. It also elucidates …

[PDF][PDF] Automatic parallelization for embedded multi-core systems using high level cost models

DA Cordes - 2013 - Citeseer
Nowadays, embedded and cyber-physical systems are utilized in nearly all operational
areas in order to support and enrich peoples' everyday life. To cope with the demands …

Parallelizing irregular applications with the Vienna HPF-Compiler VFC

S Benkner, K Saniari, V Sipkova, B Velkov - High-Performance Computing …, 1998 - Springer
Applications based on highly irregular, dynamically changing data structures cannot be
handled efficiently with current High Performance Fortran and available HPF compilers. In …

Data and process abstraction in PIPS internal representation

F Coelho, P Jouvelot, C Ancourt… - First Workshop on …, 2011 - minesparis-psl.hal.science
PIPS, a state-of-the-art, source-to-source compilation and optimization platform, has been
under development at MINES Paris-Tech since 1988, and its development is still running …

[PDF][PDF] An Integrated Platform for Heterogeneous Reconfigurable Computing.

B Pottier, J Boukhobza, T Goubier - ERSA, 2007 - Citeseer
To our knowledge, it is the first time that a project creates a set of high level tools allowing to
program different kind of reconfigurable units assembled in a System on Chip. This paper …

ParTool: a feedback-directed parallelizer

V Mishra, SK Aggarwal - … , APPT 2011, Shanghai, China, September 26-27 …, 2011 - Springer
We present a tool which gives detailed feedback to application developers on how their
programs can be made amenable to parallelization. Also, the tool automatically parallelizes …