Real-time cache management framework for multi-core architectures

R Mancuso, R Dudko, E Betti, M Cesati… - 2013 IEEE 19th Real …, 2013 - ieeexplore.ieee.org
Multi-core architectures are shaking the fundamental assumption that in real-time systems
the WCET, used to analyze the schedulability of the complete system, is calculated on …

On using locking caches in embedded real-time systems

AM Campoy, E Tamura, S Sáez, F Rodríguez… - … on Embedded Software …, 2005 - Springer
Cache memories are crucial to obtain high performance on contemporary processors.
However, they have been traditionally avoided in embedded real-time systems due to their …

Improving cache locking performance of modern embedded systems via the addition of a miss table at the L2 cache level

A Asaduzzaman, FN Sibai, M Rani - Journal of Systems Architecture, 2010 - Elsevier
To confer the robustness and high quality of service, modern computing architectures
running real-time applications should provide high system performance and high timing …

Impact of level-2 cache sharing on the performance and power requirements of homogeneous multicore embedded systems

A Asaduzzaman, FN Sibai, M Rani - Microprocessors and Microsystems, 2009 - Elsevier
In order to satisfy the needs for increasing computer processing power, there are significant
changes in the design process of modern computing systems. Major chip-vendors are …

[图书][B] Cache optimization for real-time embedded systems

A Asaduzzaman - 2009 - search.proquest.com
Cache memory is used, in most single-core and multi-core processors, to improve
performance by bridging the speed gap between the main memory and CPU. Even though …

Impact of L1 entire locking and L2 way locking on the performance, power consumption, and predictability of multicore real-time systems

A Asaduzzaman, I Mahgoub… - 2009 IEEE/ACS …, 2009 - ieeexplore.ieee.org
Based on the recent design trend from giant chip-vendors, multicore systems are being
deployed with multilevel caches to achieve higher levels of performance. Supporting real …

[PDF][PDF] Towards predictable, high-performance memory hierarchies in fixed-priority preemptive multitasking real-time systems

E Tamura, GA y Robótica, JV Busquets-Mataix… - RTNS'07, 2007 - inria.hal.science
Cache memories are crucial to obtain high performance on contemporary computing
systems. However, sometimes they have been avoided in real-time systems due to their lack …

On level-1 cache locking for high-performance low-power real-time multicore systems

A Asaduzzaman, VR Suryanarayana… - Computers & Electrical …, 2013 - Elsevier
Multiple caches in multicore architecture increase power consumption and timing
unpredictability. Although cache locking in single-core systems shows improvement for large …

Evaluation of the impact of Miss Table and victim caches in parallel embedded systems

A Asaduzzaman, I Mahgoub… - 2010 International …, 2010 - ieeexplore.ieee.org
Parallel and distributed solutions are gaining increasing importance in designing embedded
systems. Future parallel embedded systems are expected to have several hundred …

[PDF][PDF] A Power-Aware Multi-Level Cache Organization Effective for Multi-Core Embedded Systems.

A Asaduzzaman - J. Comput., 2013 - researchgate.net
Recent system design trends suggest multicore architecture for all computing platforms
including distributed and embedded systems running real-time applications. Multilevel …