M Abderehman, R Gupta… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
A hardware Trojan (HT) is a malicious modification of the design done by a rogue employee or a malicious foundry to leak secret information, create a backdoor for attackers, alter …
R Chouksey, C Karfa - IEEE Transactions on Very Large Scale …, 2020 - ieeexplore.ieee.org
High-level synthesis (HLS) technique translates the behaviors written in high-level languages like C/C++ into register transfer level (RTL) design. Due to its complexity, proving …
Y Herklotz, J Wickerson - Workshop on Languages, Tools …, 2021 - johnwickerson.github.io
With hardware designs becoming ever more complex, and demand for custom accelerators ever growing, high-level synthesis (HLS) is increasingly being relied upon. However, HLS is …
R Chouksey, C Karfa, P Bhaduri - Proceedings of the 12th Innovations in …, 2019 - dl.acm.org
Translation validation is the process of proving that the target code is a correct translation of the source program being compiled. In this work, we propose a translation validation method …
Software applications often require the transformation of an input source program into a translated one for optimization. In this process, preserving the semantics across the …
Path‐based equivalence checkers (PBECs) have been successfully applied for verification of programmes from diverse domains and from various stages of high‐level synthesis. In the …
R Chouksey, C Karfa, P Bhaduri - 2019 32nd International …, 2019 - ieeexplore.ieee.org
Path-based equivalence checkers (PBECs) have been successfully applied for verification of programs from diverse domains and at various stages of high-level synthesis. These …
R Mittal, D Blouin… - 2021 28th Asia-Pacific …, 2021 - ieeexplore.ieee.org
Software for embedded systems goes through a scheduling phase where it is subjected to optimizing transformations. In such a scenario, validating the preservation of semantics …