We present a quantum computation algorithm that enables solving the problem of logical
equivalence verification in exponentially less time than the classical deterministic …

A diagnostic automatic test pattern generation (DATPG) system is constructed by adding
new algorithmic capabilities to conventional ATPG and fault simulation programs. The …

To distinguish between a pair of transition faults, we need to find a test vector pair (LOC or
LOS type) that produces different output responses for the two faults. By adding a few logic …

The paper presents a new structural fault-independent fault collapsing method based on the
topology analysis of the circuit, which has linear complexity. The minimal necessary set of …

Faster failure isolation is critical for manufacturing yield ramp and product time to market.
Higher diagnosis resolution is essential for faster defect isolation and root-cause …

Fault collapsing of a fault-set helps in obtaining smaller test-sets as well as in reducing fault-
simulation times. In this paper, we propose two new theorems by making use of the …

A procedure for using fault dominance in a large volume diagnosis environment is
described. Fault dominance is shown to be useful for reducing the fault simulation time …

This paper presents a new fault node for implication graph that represents the Boolean
detectability status of a fault in the circuit. An implication graph with fault nodes is termed …

Equivalence and dominance relations used earlier in fault diagnosis procedures are defined
as relations between faults, similar to the relations used for fault collapsing. Since the basic …

By adding a few logic gates and one or two modeling flip-flops to the circuit under test (CUT),
we create a detection or diagnostic automatic test pattern generation (ATPG) model of …