Analysis and design of high-order QAM direct-modulation transmitter for high-speed point-to-point mm-wave wireless links
H Wang, H Mohammadnezhad… - IEEE Journal of Solid …, 2019 - ieeexplore.ieee.org
A novel high-speed wireless transmitter (TX) architecture is presented that directly
transforms incoming data bits into high-order 4 M-quadrature amplitude modulation (QAM) …
transforms incoming data bits into high-order 4 M-quadrature amplitude modulation (QAM) …
[图书][B] Advanced data converters
G Manganaro - 2011 - books.google.com
Need to get up to speed quickly on the latest advances in high performance data
converters? Want help choosing the best architecture for your application? With everything …
converters? Want help choosing the best architecture for your application? With everything …
An 8-bit 100-GS/s distributed DAC in 28-nm CMOS for optical communications
H Huang, J Heilmeyer, M Grözing… - IEEE Transactions …, 2015 - ieeexplore.ieee.org
An 8-bit 100-GS/s digital-to-analog converter (DAC) using a distributed output topology in 28-
nm low-power CMOS for optical communications is presented. The DAC can convert 1-k …
nm low-power CMOS for optical communications is presented. The DAC can convert 1-k …
3.4 A 36Gb/s PAM4 transmitter using an 8b 18GS/S DAC in 28nm CMOS
At data rates beyond 10Gb/s, most wireline links employ NRZ signaling. Serial NRZ links as
high as 56Gb/s and 60Gb/s have been reported [1]. Nevertheless, as the rate increases, the …
high as 56Gb/s and 60Gb/s have been reported [1]. Nevertheless, as the rate increases, the …
A 12 bit 1 GS/s dual-rate hybrid DAC with an 8 GS/s unrolled pipeline delta-sigma modulator achieving> 75 dB SFDR over the Nyquist band
A 12 bit Dual-Rate Hybrid digital-to-analog converter (DAC) architecture with a split Nyquist
(1 GS/s) and delta-sigma modulator path (8 GS/s) is proposed and implemented in 65 nm …
(1 GS/s) and delta-sigma modulator path (8 GS/s) is proposed and implemented in 65 nm …
A study of a millimeter-wave transmitter architecture realizing QAM directly in RF domain
Realization of high-order modulation schemes directly in the RF domain enables the
generation of spectrally efficient quadrature-amplitude-modulated (QAM) symbols using the …
generation of spectrally efficient quadrature-amplitude-modulated (QAM) symbols using the …
A 2✖ Time-Interleaved 28-GS/s 8-Bit 0.03-mm2 Switched-Capacitor DAC in 16-nm FinFET CMOS
This article presents a compact 2× time-interleaved switched-capacitor (SC) digital-to-
analog converter (DAC) for digital-intensive transmitter architectures. To minimize area and …
analog converter (DAC) for digital-intensive transmitter architectures. To minimize area and …
An 11 GS/s 1.1 GHz bandwidth interleaved ΔΣ DAC for 60 GHz radio in 65 nm CMOS
A Bhide, A Alvandpour - IEEE Journal of Solid-State Circuits, 2015 - ieeexplore.ieee.org
This work presents an 11 GS/s 1.1 GHz bandwidth interleaved ΔΣ DAC in 65 nm CMOS for
the 60 GHz radio baseband. The high sample rate is achieved by using a two-channel …
the 60 GHz radio baseband. The high sample rate is achieved by using a two-channel …
[PDF][PDF] Monolithic silicon photonic architecture for training deep neural networks with direct feedback alignment
MJ Filipovich, Z Guo, M Al-Qadasi… - arXiv preprint arXiv …, 2021 - sudip.sites.olt.ubc.ca
The field of artificial intelligence (AI) has witnessed tremendous growth in recent years,
however some of the most pressing challenges for the continued development of AI systems …
however some of the most pressing challenges for the continued development of AI systems …
An 8-bit current-steering digital to analog converter
SC Yi - AEU-International Journal of Electronics and …, 2012 - Elsevier
In this paper, an 8-bit current steering digital-to-analog converter is proposed. The digital-to-
analog converter contained four sets of current mirrors with different weight. The digital-to …
analog converter contained four sets of current mirrors with different weight. The digital-to …