Energy-efficient and variability-resilient 11T SRAM design using data-aware read–write assist (DARWA) technique for low-power applications
The need for power-efficient devices, such as smart sensor nodes, mobile devices, and
portable digital gadgets, is markedly increasing and these devices are becoming commonly …
portable digital gadgets, is markedly increasing and these devices are becoming commonly …
Read Improved and Low Leakage Power CNTFET Based Hybrid 10t SRAM Cell for Low Power Applications
Static random access memory (SRAM) cell design has undergone extensive development to
achieve good performance and low power consumption. This paper introduces an SRAM …
achieve good performance and low power consumption. This paper introduces an SRAM …
Ultra low power offering 14 nm bulk double gate FinFET based SRAM cells
YV Narayana, P VVKDV - Sustainable Computing: Informatics and …, 2022 - Elsevier
For many decades, SRAM cell design with low power dissipation is the problem of interest
for researchers due to its numerous applications in embedded systems. In this research …
for researchers due to its numerous applications in embedded systems. In this research …
A novel design of high performance and robust ultra-low power SRAM cell based on memcapacitor
The present paper proposes a six-FinFET two-memcapacitor (6T2MC) non-volatile static
random-access memory (NVSRAM). In this design, the two memcapacitors are used as non …
random-access memory (NVSRAM). In this design, the two memcapacitors are used as non …
A 4× 4 8T-SRAM array with single-ended read and differential write scheme for low voltage applications
In ultra-low-power applications, the design of power-efficient static random access memory
(SRAM) is a major concern as it plays a significant part in leakage due to its higher density …
(SRAM) is a major concern as it plays a significant part in leakage due to its higher density …
Design of dual port 9T SRAM cell with parallel processing and high performance computing
Y Chopra, P Mittal - Physica Scripta, 2024 - iopscience.iop.org
To meet industry requirements of higher transistor count SRAM cells this paper is proposing,
a nine-transistor configuration static random access memory (SRAM) cell which is …
a nine-transistor configuration static random access memory (SRAM) cell which is …
[PDF][PDF] Process Tolerant and Power Efficient SRAM Cell for Internet of Things Applications.
The use of Internet of Things (IoT) applications become dominant in many systems. Its on-
chip data processing and computations are also increasing consistently. The battery …
chip data processing and computations are also increasing consistently. The battery …
Radiation Effects and Their Impact on SRAM Design: A Comprehensive Survey with Contemporary Challenges
An extensive survey on several bit‐cell Static Random Access Memory (SRAM)
architectures and the effect of radiation induced faults and their related design concerns in …
architectures and the effect of radiation induced faults and their related design concerns in …
[PDF][PDF] Analysis of the parasitic capacitance effects on the layout of latch-based sense amplifiers for improving SRAM performance
Static random-access memory (SRAM) technology is utilized in designing cache memory to
enhance the processing performance of computer systems. The sense amplifier (SA) circuit …
enhance the processing performance of computer systems. The sense amplifier (SA) circuit …
Ultra-Low Power 5T-SRAM Cell Design using different CNTFET for exploiting Read/Write Assist Techniques.
In today's technological environment, designing the Static Random Access Memory (SRAM)
is most vital and critical memory devices. In this manuscript, two kinds of 5TSRAM are …
is most vital and critical memory devices. In this manuscript, two kinds of 5TSRAM are …