Reconfigurable Computing marks a revolutionary and hot topic that bridges the gap
between the separate worlds of hardware and software design—the key feature of …

Dynamic reconfiguration is important for reconfigurable platforms. Parallel reconfigurable
computing (PRC) architecture consists of multiple dynamic reconfigurable computing (DRC) …

Due to the precedence constraints among vertices, the partitioning problem for time-
multiplexed field-programmable gate arrays (TMFPGAs) is different from the traditional one …

In this paper, we propose the idea of temporal logic replication in dynamically reconfigurable
field-programmable gate array partitioning to reduce communication cost. Temporal logic …

Although several cell-based reporter assays have been developed for screening of viral
protease inhibitors, most of these assays have a significant limitation in that numerous false …

In this paper, we propose a resource/performance tradeoff algorithm for task scheduling of
parallel reconfigurable architectures. First, it uses unlimited resources to generate an …

Dynamically reconfigurable FPGA (DRFPGA) implements a given circuit system by
partitioning it into stages and then executing each stage sequentially. Traditionally, the …

In this article, we introduce a new placement problem motivated by the Dynamically
Reconfigurable FPGA (DRFPGA) architectures. Unlike traditional placement, the problem for …

Area Optimizations in FPGA Architecture and CAD by Valavan Manohararajah A thesis
submitted in conformity with the requirements Page 1 Area Optimizations in FPGA Architecture …

The FPGA-based configurable computing machines are evolving rapidly, due to their
flexibility and high performance. The communication cost is one of important factors in …