Efficient conversion technique from redundant binary to nonredundant binary representation

RK Barik, M Pradhan, R Panda - Journal of Circuits, Systems and …, 2017 - World Scientific
Redundant Binary (RB) to Two's Complement (TC) converter offers nonredundant
representation. However, the sign bit of TC representation has to be handled using …

An efficient redundant binary adder with revised computational rules

RK Barik, BK Bhoi, M Pradhan - Computers & Electrical Engineering, 2018 - Elsevier
Redundant binary representation (RBR) offers a carry-free addition of two redundant binary
(RB) numbers. The computational rules of the conventional RB adder (CRBA) generate …

8-Bit Modified Booth Multiplier using 20nm FinFET Technology

B Dinakar, KB Prasad, N Thyauarajan… - 2022 IEEE …, 2022 - ieeexplore.ieee.org
Multiplication is often performed via an Add and Shift operation, in which each multiplier bit
generates one multiplicand multiple bit that must be added to the partial product. When the …

Improved Redundant Binary Adder Realization in FPGA

SR Sahu, BK Bhoi, M Pradhan - Journal of Circuits, Systems and …, 2021 - World Scientific
This paper presents the design of improved redundant binary adder (IRBA) by utilizing
positive–negative encoding rules in FPGA platform. The proposed design deals with …

A Time Efficient Redundant Binary Adder with Modified Encoding Bits

SR Sahu, M Pradhan - 2021 4th Biennial International …, 2021 - ieeexplore.ieee.org
The paper presents the design of redundant binary adder using modified encoding bits. Sign
magnitude encoding bit is one of them. The proposed adder deals with positive binary …