Modelling interfaces in thin-film photovoltaic devices

MDK Jones, JA Dawson, S Campbell, V Barrioz… - Frontiers in …, 2022 - frontiersin.org
Developing effective device architectures for energy technologies—such as solar cells,
rechargeable batteries or fuel cells—does not only depend on the performance of a single …

Deformation potential extraction and computationally efficient mobility calculations in silicon from first principles

Z Li, P Graziosi, N Neophytou - Physical Review B, 2021 - APS
We present a first-principles framework to extract deformation potentials in silicon based on
density-functional theory (DFT) and density-functional perturbation theory (DFPT). We …

Detailed review on c-Si/a-Si: H heterojunction solar cells in perspective of experimental and simulation

V Kanneboina - Microelectronic Engineering, 2022 - Elsevier
The crystalline silicon (c-Si) based photovoltaic (PV) technology is most dominated among
other PV technologies. The world record highest efficiency of 26.7% and 26.1% on n & p …

TOPerc Solar Cell: An Integral Approach of Tunnel Oxide Passivated Contact (TOPCon) and Passivated Emitter and Rear Contact (PERC) Architectures for Achieving …

S Sadhukhan, S Acharyya, T Panda… - Energy …, 2023 - Wiley Online Library
Passivated emitter and rear contact (PERC) on p‐type mono silicon has a roadmap for
achieving> 24% efficiency. The decrease of the full‐area rear metal contact to partial rear …

Framework for TCAD augmented machine learning on multi-I–V characteristics using convolutional neural network and multiprocessing

T Hirtz, S Huurman, H Tian, Y Yang… - Journal of …, 2021 - iopscience.iop.org
In a world where data is increasingly important for making breakthroughs, microelectronics
is a field where data is sparse and hard to acquire. Only a few entities have the infrastructure …

Comparative study of novel u-shaped SOI FinFET against multiple-fin bulk/SOI FinFET

M Son, J Sung, HW Baac, C Shin - IEEE Access, 2023 - ieeexplore.ieee.org
Superior scalability and better gate-to-channel capacitive coupling can be achieved with
adopting gate-all-around (GAA) device architecture. However, compared against FinFET …

Impact of work-function variation on analog figures-of-merits for high-k/metal-gate junctionless FinFET and gate-all-around nanowire MOSFET

WF Lü, L Dai - Microelectronics Journal, 2019 - Elsevier
In this study, the impact of orientation of metal-gate granularity on analog figures-of-merit
(FOMs) in high-k/metal-gate junctionless (JL) fin-field-effect transistor (FinFET) and gate-all …

[HTML][HTML] A comparison of a commercial hydrodynamics TCAD solver and Fermi kinetics transport convergence for GaN HEMTs

A Tunga, K Li, E White, NC Miller, M Grupen… - Journal of Applied …, 2022 - pubs.aip.org
Various simulations of a GaN HEMT are used to study the behaviors of two different energy-
transport models: the Fermi kinetics transport model and a hydrodynamics transport model …

Impact of process variability in vertically stacked junctionless nanosheet FET

O Li, C Li, Y Wang, S Cheng, H You - Silicon, 2023 - Springer
Abstract Vertically stacked Nanosheet Field Effect Transistor (NSFET) is considered the most
promising substitution for FinFET. In order to prevent making metallurgical junctions, based …

Noise behavior in GaAs0. 2Sb0. 8/GaSb heterojunction Source-All-Around vertical Tunnel FET: A comprehensive study

P Ramesh, B Choudhuri - Materials Science and Engineering: B, 2024 - Elsevier
This article offers a comprehensive noise analysis of a GaAs 0.2 Sb 0.8/GaSb heterojunction
Source-All-Around Vertical Tunnel FET (SAA-VTFET), examining generation-recombination …