CMOS reliability from past to future: A survey of requirements, trends, and prediction methods

I Hill, P Chanawala, R Singh… - … on Device and …, 2021 - ieeexplore.ieee.org
Developments in IC fabrication, emerging high-reliability markets, and government
regulations indicate potential for significant shifts in how reliability fits within IC development …

Strategic review on different materials for FinFET structure performance optimization

KB Madhavi, SL Tripathi - IOP Conference Series: Materials …, 2020 - iopscience.iop.org
In this paper, the strategic review of different materials that are used in FinFET structure is
studied. This is achieved by using carefully designed source/drain spacers and doped …

A Generic Trap Generation Framework for MOSFET Reliability—Part I: Gate Only Stress–BTI, SILC, and TDDB

S Mahapatra, A Ansari, AS Bisht… - … on Electron Devices, 2023 - ieeexplore.ieee.org
The Reaction-Diffusion-Drift model is validated as a trap generation framework during Bias
Temperature Instability (BTI), Stress Induced Leakage Current (SILC), and Time Dependent …

Modeling of NBTI using BAT framework: DC-AC stress-recovery kinetics, material, and process dependence

S Mahapatra, N Parihar - IEEE Transactions on Device and …, 2020 - ieeexplore.ieee.org
Threshold voltage shift (ΔVT) due to Negative Bias Temperature Instability (NBTI) in p-
MOSFETs is modeled using the BTI Analysis Tool (BAT) framework. The ΔV T time kinetics …

Tailoring potentials by simulation-aided design of gate layouts for spin-qubit applications

I Seidler, M Neul, E Kammerloher, M Künne… - Physical Review …, 2023 - APS
Gate layouts of spin-qubit devices are commonly adapted from previous successful devices.
As qubit numbers and device complexity increase, modeling new device layouts and …

Modeling of DC-AC NBTI stress-recovery time kinetics in P-channel planar bulk and FDSOI MOSFETs and FinFETs

N Choudhury, N Parihar, N Goel… - IEEE Journal of the …, 2020 - ieeexplore.ieee.org
The physics-based BTI Analysis Tool (BAT) is used to model the time kinetics of threshold
voltage shift (ΔV T) during and after NBTI in p-channel planar bulk and FDSOI MOSFETs …

Comparative characterization of NWFET and FinFET transistor structures using TCAD modeling

KO Petrosyants, DS Silkin, DA Popov - Micromachines, 2022 - mdpi.com
A complete comparison for 14 nm FinFET and NWFET with stacked nanowires was carried
out. The electrical and thermal performances in two device structures were analyzed based …

A stochastic framework for the time kinetics of interface and bulk oxide traps for BTI, SILC, and TDDB in MOSFETs

S Kumar, R Anandkrishnan, N Parihar… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
A stochastic reaction-diffusion drift model is used to simulate the time kinetics of interface
and bulk oxide traps responsible for bias temperature instability (BTI), stress-induced …

Modeling of classical channel hot electron degradation in n-MOSFETs using TCAD

H Diwakar, K Thakor… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
A technology CAD (TCAD) setup is used to calculate the channel hot electron (CHE)
induced parametric drift in n-MOSFETs. The setup uses reaction-diffusion-drift model and …

Robustness evaluation of electrical characteristics of sub-22 nm FinFETs affected by physical variability

BM Kalasapati, SL Tripathi - Materials Today: Proceedings, 2022 - Elsevier
The physical parameters of digital devices have been affected by process variability The
paper is focused on subthreshold performance characterization of FET with Visual TCAD …