Clockless decision feedback equalization (DFE) for multi-level signals
A Rane - US Patent 10,972,319, 2021 - Google Patents
An apparatus includes a clockless decision feedback equal ization (DFE) loop. The
clockless DFE loop includes a summation circuit configured to combine a multi-level input …
clockless DFE loop includes a summation circuit configured to combine a multi-level input …
Series-connected delta-sigma modulator
TH Kuo - US Patent 11,616,512, 2023 - Google Patents
H03M3/414—Structural details of delta-sigma modulators, eg incremental delta-sigma
modulators characterised by the number of quantisers and their type and resolution having …
modulators characterised by the number of quantisers and their type and resolution having …
Enhancing efficiency of excess loop delay compensation in delta-sigma analog-to-digital converters
A Shikata, A Bandyopadhyay - US Patent 12,052,037, 2024 - Google Patents
Abstract Systems and methods are provided for increasing efficiency of excess loop delay
compensation in delta-sigma analog-to-digital converters. In some examples, systems and …
compensation in delta-sigma analog-to-digital converters. In some examples, systems and …
Transmission system, transmitting apparatus, receiving apparatus, and program
S Nakamoto - US Patent 11,329,743, 2022 - Google Patents
In a transmission system of an audio signal etc., circuit enlargement is suppressed and
deterioration of transmitting signal is reduced. A transmission system including a transmitting …
deterioration of transmitting signal is reduced. A transmission system including a transmitting …