Energy dissipation and transport in nanoscale devices

E Pop - Nano Research, 2010 - Springer
Understanding energy dissipation and transport in nanoscale structures is of great
importance for the design of energy-efficient circuits and energy-conversion systems. This is …

Strained Si, SiGe, and Ge channels for high-mobility metal-oxide-semiconductor field-effect transistors

ML Lee, EA Fitzgerald, MT Bulsara, MT Currie… - Journal of applied …, 2005 - pubs.aip.org
This article reviews the history and current progress in high-mobility strained Si, SiGe, and
Ge channel metal-oxide-semiconductor field-effect transistors (MOSFETs). We start by …

Three-dimensional integrated circuits

AW Topol, DC La Tulipe, L Shi, DJ Frank… - IBM Journal of …, 2006 - ieeexplore.ieee.org
Three-dimensional (3D) integrated circuits (ICs), which contain multiple layers of active
devices, have the potential to dramatically enhance chip performance, functionality, and …

Phonon–boundary scattering in ultrathin single-crystal silicon layers

W Liu, M Asheghi - Applied Physics Letters, 2004 - pubs.aip.org
Thermal engineering of many nanoscale sensors, actuators, and high-density
thermomechanical data storage devices, as well as the self-heating in deep submicron …

Thermal conductivity measurements of ultra-thin single crystal silicon layers

W Liu, M Asheghi - 2006 - asmedigitalcollection.asme.org
Self-heating in deep submicron transistors (eg, silicon-on-insulator and strained-Si) and
thermal engineering of many nanoscale devices such as nanocalorimeters and high-density …

Physics-informed deep learning for solving phonon Boltzmann transport equation with large temperature non-equilibrium

R Li, JX Wang, E Lee, T Luo - npj Computational Materials, 2022 - nature.com
Phonon Boltzmann transport equation (BTE) is a key tool for modeling multiscale phonon
transport, which is critical to the thermal management of miniaturized integrated circuits, but …

[图书][B] Silicon Heterostructure Handbook: Materials, Fabrication, Devices, Circuits and Applications of SiGe and Si Strained-Layer Epitaxy

JD Cressler, S Monfray, G Freeman, D Friedman… - 2018 - taylorfrancis.com
An extraordinary combination of material science, manufacturing processes, and innovative
thinking spurred the development of SiGe heterojunction devices that offer a wide array of …

Low-energy plasma-enhanced chemical vapor deposition for strained Si and Ge heterostructures and devices

G Isella, D Chrastina, B Rössner, T Hackbarth… - Solid-State …, 2004 - Elsevier
We review the potential of low-energy plasma-enhanced chemical vapor deposition
(LEPECVD) for the fabrication of strained Si and Ge heterostructures and devices. The …

A review of self-heating effects in advanced CMOS technologies

C Prasad - IEEE Transactions on Electron Devices, 2019 - ieeexplore.ieee.org
The march toward dimensional scaling and higher performance has led the semiconductor
industry to consider nonplanar topologies and different material systems. These choices …

Thermal phenomena in nanoscale transistors

E Pop, KE Goodson - 2006 - asmedigitalcollection.asme.org
As CMOS transistor gate lengths are scaled below 45 nm, thermal device design is
becoming an important part of microprocessor engineering. Decreasing dimensions lead to …