A review on performance comparison of advanced MOSFET structures below 45 nm technology node

N Mendiratta, SL Tripathi - Journal of Semiconductors, 2020 - iopscience.iop.org
CMOS technology is one of the most frequently used technologies in the semiconductor
industry as it can be successfully integrated with ICs. Every two years the number of MOS …

Band‐to‐Band Tunneling Control by External Forces: A Key Principle and Applications

G Woo, T Kim, H Yoo - Advanced Electronic Materials, 2023 - Wiley Online Library
Band‐to‐band tunneling (BTBT) devices with superior subthreshold swing directly related to
on/off switching speed and power consumption efficiency have emerged as a breakthrough …

Design and simulation of junctionless nanowire tunnel field effect transistor for highly sensitive biosensor

P Kumar, B Raj - Microelectronics Journal, 2023 - Elsevier
This paper investigates symmetrical design of a Junctionless Nanowire Tunnel-Field-Effect-
Transistor (JL-NWTFET) for highly sensitive biosensor. JL-NWTFET deployed using Gate-All …

Design of Low Power Si0.7Ge0.3 Pocket Junction-Less Tunnel FET Using Below 5 nm Technology

SL Tripathi, GS Patel - Wireless Personal Communications, 2020 - Springer
This work proposed the design of low power Si 0.7 Ge 0.3 pocket Junction-less TFET
(JLTFET) on bulk silicon using below 5 nm technology. The inclusion of junction-less …

Low-Power Efficient p+ Si0.7Ge0.3 Pocket Junctionless SGTFET with Varying Operating Conditions

SL Tripathi, SK Sinha, GS Patel - Journal of Electronic Materials, 2020 - Springer
A new low-power Si 1− x Ge x pocket junctionless single-gate tunnel field-effect transistor
(JLSGTFET) is designed to achieve steep subthreshold performance and a better I ON/I OFF …

A comprehensive analysis of nanoscale transistor based biosensor: a review

P Kaur, AS Buttar, B Raj - 2021 - nopr.niscpr.res.in
Imperative introduction of biosensor in the field of medicine, defence, food safety, security
and environmental contamination detection acquired paramount attraction. Thus the …

Improved drain current with suppressed short channel effect of p+ pocket double-gate MOSFET in Sub-14 nm technology node

SL Tripathi, P Pathak, A Kumar, S Saxena - Silicon, 2022 - Springer
Low dimension and low power consumption are major parameters of concern for transistor-
level design. Multi-gate MOSFET is one of the potential transistors showing better …

[HTML][HTML] Enhanced performance double-gate junction-less tunnel field effect transistor for bio-sensing application

IVV Reddy, SL Tripathi - Solid State Electronics Letters, 2021 - Elsevier
In this work, a double gate junction-less tunnel FET (DG-JLTFET) has been evaluated for
biosensing applications. Tunnelling is the concept in JLTFET which is a heavily doped JL …

Improvements in Reliability and RF Performance of Stacked Gate JLTFET Using p+ Pocket and Heterostructure Material

A Vanak, A Amini, SH Pishgar - Silicon, 2023 - Springer
In this paper, a new p+ pocket heterostructure stacked gate junction-less tunneling field
effect transistor (JLTFET) is proposed. The simulation results indicate that, the proposed …

Numerical modelling for triple hybrid gate optimization dielectric modulated junctionless gate all around SiNWFET based uricase and ChOX biosensor

R Chaujar, MG Yirak - Microsystem Technologies, 2024 - Springer
In this manuscript, a numerical model based on the electric field, threshold voltage, sub-
threshold current, and electrostatic potential in cylindrical coordinates using Poisson's …