Near-memory address translation

J Picorel, D Jevdjic, B Falsafi - 2017 26th International …, 2017 - ieeexplore.ieee.org
Memory and logic integration on the same chip is becoming increasingly cost effective,
creating the opportunity to offload data-intensive functionality to processing units placed …

A model-based design approach for heterogeneous NoC-based MPSoCs on FPGA

F Robino - 2014 - diva-portal.org
Abstract Network-on-chip (NoC) based multi-processor systems-on-chip (MPSoCs) are
promising candidates for future multi-processor embedded platforms, which are expected to …

Mpsocdk: A framework for prototyping and validating mpsoc projects on fpgas

R Van Langendonck, AK Lusala… - … on Reconfigurable and …, 2012 - ieeexplore.ieee.org
With the increasing complexity and functionality of Real-Time embedded applications,
Multiprocessor System-on-chip “MPSoC” offers the best tradeoffs in computation …

OOGen: An automated generation tool for custom MPSoC architectures based on object-oriented programming methods

H Ding, S Ma, M Huang… - 2016 IEEE International …, 2016 - ieeexplore.ieee.org
As multiprocessor systems are continuing to be adopted in academic laboratories and
industry, researchers and application developers are routinely designing multiprocessor …

High level hardware/software embedded system design with redsharc

S Skalicky, AG Schmidt, M French - arXiv preprint arXiv:1408.4725, 2014 - arxiv.org
As tools for designing multiple processor systems-on-chips (MPSoCs) continue to evolve to
meet the demands of developers, there exist systematic gaps that must be bridged to …

Parallele und kooperative Simulation für eingebettete Multiprozessorsysteme

C Roth - 2014 - publikationen.bibliothek.kit.edu
Die Entwicklung von eingebetteten Systemen wird durch die stetig steigende Anzahl und
Integrationsdichte neuer Funktionen in Kombination mit einem erhöhten Interaktionsgrad …

[PDF][PDF] Enhancement and Evaluation of Multi-Channel Circuit Switched Network on Chip

A Ejaz - 2013 - Citeseer
As a consequence of decreasing transistor size, number of functional units (processors, IP
cores, DSP blocks, memory units) on a chip are increasing. Diverse communication …

[PDF][PDF] Layered approach for runtime fault recovery in NOC-Based MPSOCS

EW Wächter - 2015 - repositorio.pucrs.br
Mecanismos de tolerância a falhas em MPSoCs são obrigatórios para enfrentar defeitos
ocorridos durante a fabricação ou falhas durante a vida útil do circuito integrado. Por …

[PDF][PDF] Implementation of Speed Efficient Image Processing algorithm on Multi-Processor System on Chip (MPSoC)

SV Admane, JB Zalke, M Das - 2014 - academia.edu
Today's world demand for faster, accurate and power efficient embedded devices. These
devices are not only used for controlling applications, but are also expected to perform …