A low-power high-speed comparator for precise applications
A Khorami, M Sharifkhani - IEEE Transactions on Very Large …, 2018 - ieeexplore.ieee.org
A low-power comparator is presented. pMOS transistors are used at the input of the
preamplifier of the comparator as well as the latch stage. Both stages are controlled by a …
preamplifier of the comparator as well as the latch stage. Both stages are controlled by a …
A low‐power technique for high‐resolution dynamic comparators
A Khorami, M Sharifkhani - International Journal of Circuit …, 2018 - Wiley Online Library
A low‐power technique for high‐resolution comparators is introduced. In this technique, p‐
type metal‐oxide‐semiconductor field‐effect transistors are employed as the input of the …
type metal‐oxide‐semiconductor field‐effect transistors are employed as the input of the …
An ultra low-power DAC with fixed output common mode voltage
A novel structure of Capacitive Digital to Analog Converters (CDAC) for Successive
Approximation Register Analog to Digital Converters (SAR ADC) is presented. In this CDAC …
Approximation Register Analog to Digital Converters (SAR ADC) is presented. In this CDAC …
A 10-Bit differential ultra-low-power SAR ADC with an enhanced MSB capacitor-split switching technique
S Polineni, MS Bhat, A Rajan - Arabian Journal for Science and …, 2019 - Springer
A fully differential energy-efficient switching scheme for binary-weighted capacitor digital-to-
analog converter (DAC) is presented. It is observed that the proposed switching scheme …
analog converter (DAC) is presented. It is observed that the proposed switching scheme …
Two-step Vcm-based MS switching method with dual-capacitive arrays for SAR ADCs
J Huang, J Wu, A Wu - Analog Integrated Circuits and Signal Processing, 2018 - Springer
An ultra-low-power two-step merge and split (MS) switching method for a dual-capacitive
arrays (DCAs) successive approximation register analogue-to-digital converter is presented …
arrays (DCAs) successive approximation register analogue-to-digital converter is presented …
A high-speed method of dynamic comparators for SAR analog to digital converters
A Khorami, M Sharifkhani - 2016 IEEE 59th International …, 2016 - ieeexplore.ieee.org
A low-power high-speed two-stage dynamic comparator is presented. The voltage
fluctuation at the first stage of the comparator (pre-amplifier stage) is limited to Vdd/2 …
fluctuation at the first stage of the comparator (pre-amplifier stage) is limited to Vdd/2 …
Vaq-Assisted Low-Power Capacitor-Splitting Switching Scheme for SAR ADCs
H Wang - Circuits, Systems, and Signal Processing, 2022 - Springer
In this paper, a novel four-level capacitor-splitting switching scheme for successive
approximation register analog-to-digital converters is proposed. The fourth reference voltage …
approximation register analog-to-digital converters is proposed. The fourth reference voltage …
A 99.43% energy saving switching scheme with asymmetric binary search algorithm for SAR ADCs
W Qu, Z Zhang, N Mei - Circuits, Systems, and Signal Processing, 2020 - Springer
In this paper, a low-energy switching scheme based on the asymmetric binary search
algorithm for successive approximation register (SAR) analog-to-digital converters (ADCs) is …
algorithm for successive approximation register (SAR) analog-to-digital converters (ADCs) is …
An accurate low-power DAC for SAR ADCs
SB Yazdani, A Khorami… - 2016 IEEE 59th …, 2016 - ieeexplore.ieee.org
A highly energy-efficiency switching procedure for the capacitor-splitting digital-to-analog
converter (DAC) is presented for successive approximation register (SAR) analogue-to …
converter (DAC) is presented for successive approximation register (SAR) analogue-to …
A 92.1% area-efficient charge sharing switching scheme with near zero reset energy for SAR ADCs
P Yue, Y Zhang, Y Li, Z Zhu - Analog Integrated Circuits and Signal …, 2019 - Springer
This paper presented a highly energy-efficient and area-efficient capacitor switching scheme
with near zero reset energy for successive approximation register analog-to-digital …
with near zero reset energy for successive approximation register analog-to-digital …