Apparatus and methods for timing offset compensation in frequency synthesizers
GJ Allan - US Patent 11,082,051, 2021 - Google Patents
Apparatus and methods for timing offset compensation of frequency synthesizers are
provided herein. In certain embodiments, an electronic system includes a frequency …
provided herein. In certain embodiments, an electronic system includes a frequency …
Fast locking sequence for phase-locked loops
NE Weeks, RP Nelson - US Patent 11,177,816, 2021 - Google Patents
Apparatus and methods for clock synchronization and frequency translation are provided
herein. Clock synchronization and frequency translation integrated circuits (ICs) generate …
herein. Clock synchronization and frequency translation integrated circuits (ICs) generate …
Clock and data recovery devices with fractional-N PLL
M Talegaonkar, J Pernillo, J Sun, P Prabha… - US Patent …, 2020 - Google Patents
The present invention relates to data communication and electrical circuits. More
specifically, embodiments of the present invention provide a clock and data recovery (CDR) …
specifically, embodiments of the present invention provide a clock and data recovery (CDR) …
Phase interpolation based clock data recovery circuit and communication device including the same
H Kim, H Song, J Park - US Patent 11,456,851, 2022 - Google Patents
A clock data recovery circuit includes a phase locked loop (PLL), a code signal generator,
and a clock and data generator. The PLL generates a plurality of reference clock signals of …
and a clock and data generator. The PLL generates a plurality of reference clock signals of …
Beam correspondence method and apparatus, user equipment and base station
J Zhou - US Patent App. 17/310,426, 2022 - Google Patents
A beam correspondence method includes: determining sweeping configuration information
for a beam correspon dence state, wherein the sweeping configuration information indicates …
for a beam correspon dence state, wherein the sweeping configuration information indicates …
Phase-locking apparatus and phase-locking method
Y Dongsheng, LIU Fangcheng, W Xiongfei - US Patent 11,038,512, 2021 - Google Patents
Embodiments of this application provide a phase-locking apparatus and a phase-locking
method. The phase-locking apparatus includes an amplitude adjustment unit, an amplitude …
method. The phase-locking apparatus includes an amplitude adjustment unit, an amplitude …
Clock and data recovery devices with fractional-N PLL
M Talegaonkar, J Pernillo, J Sun, P Prabha… - US Patent …, 2022 - Google Patents
The present invention relates to data communication and electrical circuits. More
specifically, embodiments of the present invention provide a clock and data recovery (CDR) …
specifically, embodiments of the present invention provide a clock and data recovery (CDR) …
Frequency multiplier system with multi-transition controller
S Howe, X Wu, JA Fredenburg - US Patent 11,831,318, 2023 - Google Patents
A frequency multiplier system includes a first frequency multiplier circuit to generate a first
signal having a first frequency. The first frequency multiplier circuit includes a first post …
signal having a first frequency. The first frequency multiplier circuit includes a first post …
Clock and data recovery devices with fractional-N PLL
M Talegaonkar, J Pernillo, J Sun, P Prabha… - US Patent …, 2023 - Google Patents
The present invention relates to data communication and electrical circuits. More
specifically, embodiments of the present invention provide a clock and data recovery (CDR) …
specifically, embodiments of the present invention provide a clock and data recovery (CDR) …
Phase detectors with alignment to phase information lost in decimation
RP Nelson - US Patent 11,705,914, 2023 - Google Patents
Apparatus and methods for clock synchronization and frequency translation are provided
herein. Clock synchronization and frequency translation integrated circuits (ICs) generate …
herein. Clock synchronization and frequency translation integrated circuits (ICs) generate …