Automating current-aware integrated circuit and package design and optimization

J Darringer, J Shin - US Patent 8,826,203, 2014 - Google Patents
BACKGROUND The present disclosure relates to semiconductor device design,
manufacture and packaging methods to improve elec trical current delivery into a …

Adaptive workload based optimizations to mitigate current delivery limitations in integrated circuits

P Bose, A Buyuktosunoglu, JA Darringer… - US Patent …, 2014 - Google Patents
A dynamic system coupled with “pre-Silicon” design methodologies and “post-Silicon”
current optimizing programming methodologies to improve and optimize current delivery into …

Estimating power supply of a 3D IC

W Yin - US Patent 8,930,875, 2015 - Google Patents
Embodiments of present invention include a method and apparatus of estimating power
supply of a 3DIC. The method particularly includes obtaining current information and lay out …

Adaptive workload based optimizations coupled with a heterogeneous current-aware baseline design to mitigate current delivery limitations in integrated circuits

P Bose, A Buyuktosunoglu, JA Darringer… - US Patent …, 2014 - Google Patents
A dynamic system coupled with “pre-Silicon” design methodologies and “post-Silicon”
current optimizing programming methodologies to improve and optimize current delivery into …

Token-based current control to mitigate current delivery limitations in integrated circuits

P Bose, A Buyuktosunoglu, JA Darringer… - US Patent …, 2014 - Google Patents
A system and method of operating an integrated circuit (IC) having a fixed layout of one or
more blocks having one or more current sources therein that draw electrical current from a …

Current-aware floorplanning to overcome current delivery limitations in integrated circuits

P Bose, A Buyuktosunoglu, JA Darringer… - US Patent …, 2014 - Google Patents
A dynamic system coupled with “pre-Silicon” design methodologies and “post-Silicon”
current optimizing programming methodologies to improve and optimize current delivery into …

Integrated device and method of forming the same

H Biswas, KN Yang, CH Wang… - US Patent …, 2020 - Google Patents
(57) ABSTRACT A method for forming an integrated device includes follow ing operations. A
first circuit is provided. The first circuit has a first connecting path, a plurality of second …

Signal path of a multiple-patterned semiconductor device

DH Allen, DM Dewanz, DP Paulsen… - US Patent …, 2015 - Google Patents
US9021407B2 - Signal path of a multiple-patterned semiconductor device - Google Patents
US9021407B2 - Signal path of a multiple-patterned semiconductor device - Google Patents …

Signal path of a multiple-patterned semiconductor device

DH Allen, DM Dewanz, DP Paulsen… - US Patent …, 2015 - Google Patents
BACKGROUND The semiconductor industry is producing more and more capable
components with Smaller and Smaller feature sizes. Due to the increased demand for highly …

System and computer program product for integrated circuit design

LIN Chin-Shen, H Biswas, KN Yang… - US Patent 11,775,725, 2023 - Google Patents
A system includes a processor configured to determine a power parameter associated with a
cell in an integrated circuit (IC) layout diagram. In response to the determined power …