Machine learning in compiler optimization

Z Wang, M O'Boyle - Proceedings of the IEEE, 2018 - ieeexplore.ieee.org
In the last decade, machine-learning-based compilation has moved from an obscure
research niche to a mainstream activity. In this paper, we describe the relationship between …

Mapping techniques in multicore processors: current and future trends

M Gupta, L Bhargava, S Indu - The Journal of Supercomputing, 2021 - Springer
Multicore systems are in demand due to their high performance thus making application
mapping an important research area in this field. Breaking an application into multiple …

Real time power estimation and thread scheduling via performance counters

K Singh, M Bhadauria, SA McKee - ACM SIGARCH Computer …, 2009 - dl.acm.org
Estimating power consumption is critical for hardware and software developers, and of the
latter, particularly for OS programmers writing process schedulers. However, obtaining …

Thread reinforcer: Dynamically determining number of threads via os level monitoring

KK Pusukuri, R Gupta… - 2011 IEEE International …, 2011 - ieeexplore.ieee.org
It is often assumed that to maximize the performance of a multithreaded application, the
number of threads created should equal the number of cores. While this may be true for …

An approach to resource-aware co-scheduling for CMPs

M Bhadauria, SA McKee - Proceedings of the 24th ACM International …, 2010 - dl.acm.org
We develop real-time scheduling techniques for improving performance and energy for
multiprogrammed workloads that scale non-uniformly with increasing thread counts …

Adaptive configuration selection for power-constrained heterogeneous systems

PE Bailey, DK Lowenthal, V Ravi… - 2014 43rd …, 2014 - ieeexplore.ieee.org
As power becomes an increasingly important design factor in high-end supercomputers,
future systems will likely operate with power limitations significantly below their peak power …

Wake-up latencies for processor idle states on current x86 processors

R Schöne, D Molka, M Werner - Computer Science-Research and …, 2015 - Springer
During the last decades various low-power states have been implemented in processors.
They can be used by the operating system to reduce the power consumption. The applied …

Machine learning based online performance prediction for runtime parallelization and task scheduling

J Li, X Ma, K Singh, M Schulz… - … analysis of systems …, 2009 - ieeexplore.ieee.org
With the emerging many-core paradigm, parallel programming must extend beyond its
traditional realm of scientific applications. Converting existing sequential applications as …

Vision-based hand gesture recognition using combinational features

C Yu, X Wang, H Huang, J Shen… - 2010 Sixth International …, 2010 - ieeexplore.ieee.org
This paper presents a feature extraction method for hand gesture based on multi-layer
perceptron. The feature of hand skin color in the YCbCr color space is used to detect hand …

Apollo: Reusable models for fast, dynamic tuning of input-dependent code

D Beckingsale, O Pearce, I Laguna… - 2017 IEEE …, 2017 - ieeexplore.ieee.org
Increasing architectural diversity makes performance portability extremely important for
parallel simulation codes. Emerging on-node parallelization frameworks such as Kokkos …