Routing is a complex and critical stage in the physical design of Very Large Scale
Integration (VLSI), minimizing interconnect length and delay to optimize overall chip …

The Steiner minimal tree (SMT) problem is an NP-hard problem, which is the best
connection model for a multi-terminal net in global routing problem. This paper presents a …

Constructing a timing-driven Steiner tree is very important in VLSI performance-driven
routing stage. Meanwhile, non-Manhattan architecture is supported by several …

For routing industrial circuits, the Steiner minimal tree (SMT) model can be applied in
different routing problems, such as wirelength optimization, congestion reduction, and delay …

Limited preemption scheduling has been introduced as a viable alternative to non-
preemptive and fully preemptive scheduling when reduced blocking times need to coexist …

With extreme miniaturization of traditional CMOS devices in deep sub-micron design levels,
the delay of a circuit, as well as power dissipation and area are dominated by …

The Octagonal Steiner Minimal Tree (OSMT) problem is an NP-hard problem, which is one
of the key problems in non-Manhattan routing. Particle Swarm Optimization (PSO) has been …

We present a deep, fully convolutional neural network that learns to route a circuit layout net
with appropriate choice of metal tracks and wire class combinations. Inputs to the network …

With extreme miniaturization of traditional CMOS devices in deep sub-micron design levels,
the delay of a circuit, as well as power dissipation and area are dominated by …

The dominance of interconnect delay in VLSI circuit design is well-known. Construction of
routing trees in recent times has to take care of the timing issues for faster design …