Blind Zone-Less Phase Frequency Detector for a Low-Power Phase-Locked Loop Architecture
M Divya, K Sundaram - Circuits, Systems, and Signal Processing, 2023 - Springer
The phase frequency detector (PFD) is an important component in a phase-locked loop
(PLL). PFD detects the timing difference between the reference clock (REFCK) and the …
(PLL). PFD detects the timing difference between the reference clock (REFCK) and the …
Design and implementation of a second order PLL based frequency synthesizer for implantable medical devices
D Kumar, H Shrimali - Integration, 2022 - Elsevier
In this paper, a low power 450 MHz frequency synthesizer for implantable medical device
(IMD) is presented. A current-reuse LC voltage-controlled oscillator is used to lower the …
(IMD) is presented. A current-reuse LC voltage-controlled oscillator is used to lower the …
[引用][C] A Low Power PLL with 1-V Supply Voltage and 2-Stage Ring Oscillator in 180 nm CMOS
Y Zeng, Y Dai - Journal of Circuits, Systems and Computers, 2024 - World Scientific
This paper proposes a low power charge pump PLL (CPPLL) with 1-V supply voltage in 180
nm CMOS technology, which serves as low-cost clock generator for heterogenous …
nm CMOS technology, which serves as low-cost clock generator for heterogenous …