Whereas contemporary Last Level Cache (LLC) designs occupy a significant fraction of total
die area in chip-multiprocessors (CMPs), approaches to deal with the vulnerability increase …

All Programmable System-on-Chip (APSoC) devices are designed to provide higher overall
system performance and programmable flexibility at lower power consumption and costs …

Soft errors induced by energetic particle strikes in on-chip cache memories have become an
increasing challenge in designing new generation reliable microprocessors. Previous efforts …

Spin-Transfer Torque Magnetic RAM (STT-MRAM) as one of the most promising
replacements for SRAMs in on-chip cache memories benefits from higher density and …

Abstract System reliability has become a main concern during the computer-based system
design process. It is one of the most important characteristics of the system quality. The …

This work proposes a methodology to diagnose radiation-induced faults in a microprocessor
using the hardware trace infrastructure. The diagnosis capabilities of this approach are …

Cache memories are traditionally disabled in space-level and safety-critical applications,
since it was believed that the sensitive area they introduce would compromise the system …

Due to the growing trend that a Single Event Upset (SEU) can cause spatial Multi-Bit Upsets
(MBUs), the effects of spatial MBUs has recently become an important yet very challenging …

Tag array in on-chip caches is one of the most vulnerable components to radiation-induced
soft errors. Protecting the tag array in some processors is limited to error detection using the …

A content addressable memory (CAM) is an SRAM-based memory that can be accessed in
parallel to search for a given search word, providing as a result the address of the matching …