[PDF][PDF] Impact of WebQuest and gender on writing achievement in professional business English

GM Awada, GM Ghaith - Taiwan International ESP Journal, 2015 - academia.edu
The Impact of WebQuest and Gender on Writing Achievement in Professional Business
English Page 1 1 Taiwan International ESP Journal, Vol. 6:2, 1-27, 2014 Abstract This …

HiWA: A hierarchical wireless network-on-chip architecture

A Rezaei, F Safaei, M Daneshtalab… - … Conference on High …, 2014 - ieeexplore.ieee.org
Due to high latency and high power consumption in long hops between operational cores of
NoCs, the performance of such architectures has been limited. In order to fill the gap …

[PDF][PDF] A Single Parity-Check Digit for One Trit Error Detection in Ternary Communication Systems: Gate-Level and Transistor-Level Designs.

RF Mirzaee, MS Daliri, K Navi… - J. Multiple Valued Log …, 2017 - academia.edu
Error detection is a very important subject for all communication systems, including those
that use Multiple-Valued Logic (MVL). Parity-check code is a well-known, low-cost, and …

Multi valued parity generator based on Sudoku tables: properties and detection probability

S Ghalamdoost Pirbazari, A Souri… - IET …, 2020 - Wiley Online Library
Parity‐check is a simple yet effective error detection method. Several other more
sophisticated error detection techniques are founded upon single parity‐check (SPC) …

Area efficient camouflaging technique for securing IC reverse engineering

ML Ali, MI Hossain, FS Hossain - Plos one, 2021 - journals.plos.org
Reverse engineering is a burning issue in Integrated Circuit (IC) design and manufacturing.
In the semiconductor industry, it results in a revenue loss of billions of dollars every year. In …

fastRTM: um ambiente integrado para desenvolvimento rápido da migração reversa no tempo (RTM) em plataformas FPGA de alto desempenho

VWC Medeiros - 2013 - bdtd.ibict.br
O aumento constante da demanda por desempenho e eficiência, e a barreira imposta ao
aumento da frequência de operação dos processadores pela tecnologia utilizada na …

A verified compiler for Handel-C

JI Perna - 2010 - etheses.whiterose.ac.uk
The recent popularity of Field Programmable Gate Array (FPGA) technology has made the
synthesis of Hardware Description Language (HDL) programs into FPGAs a very attractive …

Developing portable FPGA applications-A literature review

B Klöpper, N Cranston, M Aleksy… - 2013 11th IEEE …, 2013 - ieeexplore.ieee.org
Industrial applications from areas like automation, process control, or power controls have a
very long-life time up-to 30 years or even more. Supporting applications developed for such …

An Empirical Investigation on System and Statement Level Parallelism Strategies for Accelerating Scatter Search Using Handel‐C and Impulse‐C

M Walton, O Ahmed, G Grewal, S Areibi - VLSI Design, 2012 - Wiley Online Library
Scatter Search is an effective and established population‐based metaheuristic that has
been used to solve a variety of hard optimization problems. However, the time required to …

[PDF][PDF] Nurturing the Cyber-Physical Pedagogical Approach for Outcome based Learning in Embedded Systems

R Kamat, TD Dongale, GH Leela… - Proceedings of the …, 2013 - researchgate.net
Embedded system is a rapidly emerging branch of Electronics engineering that derives the
concepts and ideas from host of other branches of knowledge such as Electrical …