From MTJ device to hybrid CMOS/MTJ circuits: A review

VK Joshi, P Barla, S Bhat, BK Kaushik - IEEE Access, 2020 - ieeexplore.ieee.org
Spintronics is one of the growing research areas which has the capability to overcome the
issues of static power dissipation and volatility suffered by the complementary metal-oxide …

Comphy—A compact-physics framework for unified modeling of BTI

G Rzepa, J Franco, B O'Sullivan, A Subirats… - Microelectronics …, 2018 - Elsevier
Abstract Metal-oxide-semiconductor (MOS) devices are affected by generation,
transformation, and charging of oxide and interface defects. Despite 50 years of research …

Physical modeling of charge trapping in 4H-SiC DMOSFET technologies

C Schleich, D Waldhoer, K Waschneck… - … on Electron Devices, 2021 - ieeexplore.ieee.org
Silicon carbide (SiC) MOSFETs still exhibit higher drifts of the threshold voltage than
comparable silicon devices due to charge trapping, especially regarding small time scales …

Efficient physical defect model applied to PBTI in high-κ stacks

G Rzepa, J Franco, A Subirats, M Jech… - 2017 IEEE …, 2017 - ieeexplore.ieee.org
Instabilities in MOS-based devices with various substrates ranging from Si, SiGe, IIIV to 2D
channel materials, can be explained by defect levels in the dielectrics and non-radiative …

NBTI degradation and recovery in analog circuits: Accurate and efficient circuit-level modeling

KU Giering, K Puschkarsky, H Reisinger… - … on Electron Devices, 2019 - ieeexplore.ieee.org
We investigate the negative-bias temperature instability (NBTI) degradation and recovery of
pMOSFETs under continuously varying analog-circuit stress voltages and thereby …

Impact of negative bias temperature instability on p-channel power VDMOSFET used in practical applications

N Mitrović, S Veljković, V Davidović… - Microelectronics …, 2022 - Elsevier
Impact of the negative bias temperature instabilities (NBTI) on p-channel power vertical
double diffused MOS (VDMOS) transistors was a subject of extensive research in previous …

The defect-centric perspective of device and circuit reliability—From gate oxide defects to circuits

B Kaczer, J Franco, P Weckx, PJ Roussel, M Simicic… - Solid-State …, 2016 - Elsevier
Abstract As-fabricated (time-zero) variability and mean device aging are nowadays routinely
considered in circuit simulations and design. Time-dependent variability (reliability-related …

Reliability and variability-aware DTCO flow: Demonstration of projections to n3 FinFET and nanosheet technologies

G Rzepa, M Karner, O Baumgartner… - 2021 IEEE …, 2021 - ieeexplore.ieee.org
Reliability and variability-aware simulations of logic cells are essential to correctly analyze
and predict the performance of upcoming technologies. A simulation flow for DTCO is …

Ml-based aging monitoring and lifetime prediction of iot devices with cost-effective embedded tags for edge and cloud operability

AR Shamshiri, MB Ghaznavi-Ghoushchi… - IEEE Internet of …, 2021 - ieeexplore.ieee.org
The growing number of smart connected devices raises challenges in system reliability.
Prediction of failures in Internet of Things (IoT) ecosystems is a significant problem …

[HTML][HTML] A general approach for degradation modeling to enable a widespread use of aging simulations in IC design

A Lange, FAV Gonzalez, KU Giering… - Microelectronics …, 2022 - Elsevier
The importance of integrated circuit (IC) reliability has been growing to benefit from the
potentials of advanced semiconductor technologies in long-living applications, such as …