Applications of artificial intelligence on the modeling and optimization for analog and mixed-signal circuits: A review

M Fayazi, Z Colter, E Afshari… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
Recently, there have been many studies attempting to take advantage of advancements in
Artificial Intelligence (AI) in Analog and Mixed-Signal (AMS) circuit design. Automated circuit …

Bridging Nanomanufacturing and Artificial Intelligence—A Comprehensive Review

M Nandipati, O Fatoki, S Desai - Materials, 2024 - mdpi.com
Nanomanufacturing and digital manufacturing (DM) are defining the forefront of the fourth
industrial revolution—Industry 4.0—as enabling technologies for the processing of materials …

LithoGAN: End-to-end lithography modeling with generative adversarial networks

W Ye, MB Alawieh, Y Lin, DZ Pan - Proceedings of the 56th Annual …, 2019 - dl.acm.org
Lithography simulation is one of the most fundamental steps in process modeling and
physical verification. Conventional simulation methods suffer from a tremendous …

High-definition routing congestion prediction for large-scale FPGAs

MB Alawieh, W Li, Y Lin, L Singhal… - 2020 25th Asia and …, 2020 - ieeexplore.ieee.org
To speed up the FPGA placement and routing closure, we propose a novel approach to
predict the routing congestion map for large-scale FPGA designs at the placement stage …

Wafer map defect patterns classification using deep selective learning

MB Alawieh, D Boning, DZ Pan - 2020 57th ACM/IEEE Design …, 2020 - ieeexplore.ieee.org
With the continuous drive toward integrated circuits scaling, efficient yield analysis is
becoming more crucial yet more challenging. In this paper, we propose a novel …

Powernet: SOI lateral power device breakdown prediction with deep neural networks

J Chen, MB Alawieh, Y Lin, M Zhang, J Zhang… - IEEE …, 2020 - ieeexplore.ieee.org
The breakdown performance is a critical metric for power device design. This paper explores
the feasibility of efficiently predicting the breakdown performance of silicon on insulator (SOI) …

TEMPO: Fast mask topography effect modeling with deep learning

W Ye, MB Alawieh, Y Watanabe, S Nojima… - Proceedings of the …, 2020 - dl.acm.org
With the continuous shrinking of the semiconductor device dimensions, mask topography
effects stand out among the major factors influencing the lithography process. Including …

GAN-SRAF: Sub-resolution assist feature generation using conditional generative adversarial networks

MB Alawieh, Y Lin, Z Zhang, M Li, Q Huang… - Proceedings of the 56th …, 2019 - dl.acm.org
As the integrated circuits (IC) technology continues to scale, resolution enhancement
techniques (RETs) are mandatory to obtain high manufacturing quality and yield. Among …

Litho-GPA: Gaussian process assurance for lithography hotspot detection

W Ye, MB Alawieh, M Li, Y Lin… - 2019 Design, Automation …, 2019 - ieeexplore.ieee.org
Lithography hotspot detection is one of the fundamental steps in physical verification. Due to
the increasingly complicated design patterns, early and quick feedback for lithography …

GAN-SRAF: subresolution assist feature generation using generative adversarial networks

MB Alawieh, Y Lin, Z Zhang, M Li… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
As the integrated circuits (ICs) technology continues to scale, resolution enhancement
techniques (RETs) are mandatory to obtain high manufacturing quality and yield. Among …