Fine-grained recognition without part annotations

J Krause, H Jin, J Yang, L Fei-Fei - Proceedings of the IEEE …, 2015 - cv-foundation.org
Scaling up fine-grained recognition to all domains of fine-grained objects is a challenge the
computer vision community will need to face in order to realize its goal of recognizing all …

Robust calculation of crosstalk delay change in integrated circuit design

I Keller, K Tseng, N Verghese - US Patent 7,359,843, 2008 - Google Patents
(57) ABSTRACT A method of delay change determination in an integrated circuit design
including a stage with a victim net and one or more aggressor nets capacitively coupled …

Probabilistic analysis and design of metallic-carbon-nanotube-tolerant digital logic circuits

J Zhang, NP Patil, S Mitra - IEEE Transactions on Computer …, 2009 - ieeexplore.ieee.org
Metallic carbon nanotubes (CNTs) pose a major barrier to the design of digital logic circuits
using CNT field-effect transistors (CNFETs). Metallic CNTs create source to drain shorts in …

Carbon nanotube robust digital VLSI

J Zhang, A Lin, N Patil, H Wei, L Wei… - … on Computer-Aided …, 2012 - ieeexplore.ieee.org
Carbon nanotube field-effect transistors (CNFETs) are excellent candidates for building
highly energy-efficient electronic systems of the future. Fundamental limitations inherent to …

A robust cell-level crosstalk delay change analysis

I Keller, K Tseng, N Verghese - IEEE/ACM International …, 2004 - ieeexplore.ieee.org
In This work we present a robust and efficient methodology for crosstalk-induced delay
change analysis for ASIC design styles. The approach employs optimization methods to …

Carbon nanotube correlation: Promising opportunity for CNFET circuit yield enhancement

J Zhang, S Bobba, N Patil, A Lin, HSP Wong… - Proceedings of the 47th …, 2010 - dl.acm.org
Carbon Nanotubes (CNTs) are grown using chemical synthesis, and the exact positioning
and chirality of CNTs are very difficult to control. As a result," small-width" Carbon Nanotube …

Characterization and design of logic circuits in the presence of carbon nanotube density variations

J Zhang, NP Patil, A Hazeghi… - IEEE Transactions on …, 2011 - ieeexplore.ieee.org
Variations in the spatial density of carbon nanotubes (CNTs), resulting from the lack of
precise control over CNT positioning during chemical synthesis, is a major hurdle to the …

Analytical modeling of single event transients propagation in combinational logic gates

X Gili, S Barcelo, J Segura - IEEE Transactions on Nuclear …, 2012 - ieeexplore.ieee.org
We present a single event transient (SET) propagation model that can be used to quantify
the propagation likelihood of a given noise waveform trough CMOS logic gates. This …

Accurate crosstalk noise modeling for early signal integrity analysis

L Ding, D Blaauw, P Mazumder - IEEE Transactions on …, 2003 - ieeexplore.ieee.org
In this paper, we propose an accurate and fast method to estimate the crosstalk noise in the
presence of multiple aggressor nets for use in physical design automation tools. Since noise …

Post-route gate sizing for crosstalk noise reduction

MR Becer, D Blaauw, I Algor, R Panda, C Oh… - Proceedings of the 40th …, 2003 - dl.acm.org
Gate sizing is a practical and a feasible crosstalk noise repair technique in the post route
design stage, especially for block level sea-of-gates designs. The difficulty in gate sizing for …