A review on performance evaluation of different low power SRAM cells in nano-scale era
The growing demand of Internet of things based portable gadgets motivate to develop low
power static random access memory (SRAM) cell. It occupies large portion in modern …
power static random access memory (SRAM) cell. It occupies large portion in modern …
Design of soft-error-aware SRAM with multi-node upset recovery for aerospace applications
To achieve improved speed of operation, a higher integration density and lower power
dissipation, transistors are being scaled aggressively. This trend has reduced the critical …
dissipation, transistors are being scaled aggressively. This trend has reduced the critical …
Soft-error resilient read decoupled SRAM with multi-node upset recovery for space applications
Space consists of high-energy particles and high-temperature fluctuations, which causes
single event upsets (SEUs). Conventional 6T static random access memory (SRAM) is …
single event upsets (SEUs). Conventional 6T static random access memory (SRAM) is …
A schmitt-trigger-based low-voltage 11 T SRAM cell for low-leakage in 7-nm FinFET technology
E Abbasian, E Mani, M Gholipour… - Circuits, Systems, and …, 2022 - Springer
This paper proposes a modified Schmitt-trigger (ST)-based single-ended 11 T (MST11T)
SRAM cell. The proposed cell is best suited to ultra-low voltage applications. Two ST-based …
SRAM cell. The proposed cell is best suited to ultra-low voltage applications. Two ST-based …
Soft-error-immune read-stability-improved SRAM for multi-node upset tolerance in space applications
With aggressive scaling of transistor size and supply voltage, the critical charge of the
sensitive nodes is reducing rapidly. As a result, when these deep submicron devices are …
sensitive nodes is reducing rapidly. As a result, when these deep submicron devices are …
A novel CNTFET based Schmitt-Trigger read decoupled 12T SRAM cell with high speed, low power, and high Ion/Ioff ratio
Many researchers are working to develop a static random access memory (SRAM) cell that
uses low power, has good stability, better I on/I off ratio and speed. This paper presents a …
uses low power, has good stability, better I on/I off ratio and speed. This paper presents a …
Single‐ended half‐select disturb‐free 11T static random access memory cell for reliable and low power applications
E Abbasian, M Gholipour - International Journal of Circuit …, 2021 - Wiley Online Library
This paper presents an 11 transistor (SEHF11T) static random access memory (SRAM) cell
with high read static noise margin (RSNM) and write static noise margin (WSNM). It …
with high read static noise margin (RSNM) and write static noise margin (WSNM). It …
Design of multi-cell upset immune single-end SRAM for low power applications
A Sachdeva, VK Tomar - AEU-International Journal of Electronics and …, 2021 - Elsevier
The on-chip static random access memory (SRAM) has been under revamp due to swift
growth in demand of power-efficient internet-of-things based devices. In this context, a low …
growth in demand of power-efficient internet-of-things based devices. In this context, a low …
Soft-error-aware read-decoupled SRAM with multi-node recovery for aerospace applications
In advanced technology nodes, SRAM cells, used in the aerospace industry, have become
highly susceptible to soft-error. In this brief, a Soft-Error-Aware Read-Decoupled 14T …
highly susceptible to soft-error. In this brief, a Soft-Error-Aware Read-Decoupled 14T …
Design of a stable single sided 11t static random access memory cell with improved critical charge
A Sachdeva - International Journal of Numerical Modelling …, 2023 - Wiley Online Library
Radiation‐induced soft errors are becoming a key challenge in satellite‐based
communication. The worst‐hit component of such devices is static random‐access memory …
communication. The worst‐hit component of such devices is static random‐access memory …