Pushing the performance envelope of modular exponentiation across multiple generations of GPUs

N Emmart, C Weems - 2015 IEEE international parallel and …, 2015 - ieeexplore.ieee.org
Multiprecision modular exponentiation is a key operation in popular encryption schemes
such as RSA, but is computationally expensive. Contexts such as handling many secure …

A study of high performance multiple precision arithmetic on graphics processing units

N Emmart - 2018 - scholarworks.umass.edu
Multiple precision (MP) arithmetic is a core building block of a wide variety of algorithms in
computational mathematics and computer science. In mathematics MP is used in …

Practical methodology of post-layout gate sizing for 15% more power saving

N Miura, N Kato, T Kuroda - ASP-DAC 2004: Asia and South …, 2004 - ieeexplore.ieee.org
We present a practical methodology of post-layout gate sizing for power reduction. Wire
capacitance presumed in logic synthesis typically contains excessive margin for better …

[PDF][PDF] A Bibliography of Publications in Parallel Processing

NHF Beebe - 2022 - ctan.math.utah.edu
A Bibliography of Publications in Parallel Processing Letters Page 1 A Bibliography of
Publications in Parallel Processing Letters Nelson HF Beebe University of Utah Department of …