Multiple precision (MP) arithmetic is a core building block of a wide variety of algorithms in computational mathematics and computer science. In mathematics MP is used in …
N Miura, N Kato, T Kuroda - ASP-DAC 2004: Asia and South …, 2004 - ieeexplore.ieee.org
We present a practical methodology of post-layout gate sizing for power reduction. Wire capacitance presumed in logic synthesis typically contains excessive margin for better …
A Bibliography of Publications in Parallel Processing Letters Page 1 A Bibliography of Publications in Parallel Processing Letters Nelson HF Beebe University of Utah Department of …