Design and development of efficient SRAM cell based on FinFET for low power memory applications

MVN Rao, M Hema, R Raghutu… - Journal of Electrical …, 2023 - Wiley Online Library
Stationary random‐access memory (SRAM) undergoes an expansion stage, to repel
advanced process variation and support ultra‐low power operation. Memories occupy more …

Design of Enhanced Reversible 9T SRAM Design for the Reduction in Sub-threshold Leakage Current with14nm FinFET Technology

P Praveen, RK Singh - ACM Transactions on Design Automation of …, 2023 - dl.acm.org
Power dissipation is considered one of the important issues in low power Very-large-scale
integration (VLSI) circuit design and is related to the threshold voltage. Generally, the sub …

Design and comparative analysis of SRAM array using low leakage controlled transistor technique with improved delay

K Gavaskar, MS Narayanan, MS Nachammal… - Journal of Ambient …, 2022 - Springer
Static random access memory power and speed dissipation are the significant factor in most
of the electronic applications, which prompts numerous plans with the power utilization of …

[PDF][PDF] A comparative analysis of finfet based sram design

V Kumbar, M Waje - IJEER, 2022 - pccoer.com
░ ABSTRACT-FinFETs are widely used as efficient alternatives to the single gate general
transistor in technology scaling because of their narrow channel characteristic. The width …

A 4× 4 8T-SRAM array with single-ended read and differential write scheme for low voltage applications

C Duari, S Birla, AK Singh - Semiconductor Science and …, 2021 - iopscience.iop.org
In ultra-low-power applications, the design of power-efficient static random access memory
(SRAM) is a major concern as it plays a significant part in leakage due to its higher density …

Design of high efficient low power static logic circuit using SG FinFET

V Rameya Sridharan, M Alagarsamy… - … Journal of Electronics, 2024 - Taylor & Francis
The increasing demand of integration density improvement and battery-powered device
efficiency reduced complementary metal-oxide semiconductor (CMOS) technology node. In …

Recent Advancements in the Applications of ZnO: A Versatile Material

CP Gupta, AK Singh - Nanotechnology, 2022 - taylorfrancis.com
Zinc Oxide (ZnO) is a versatile wide bandgap material with good thermal conductivity, high
electron mobility, high transparency, low temperature fabrication and a large exciton binding …

A 9T FinFET SRAM cell for ultra-low power application in the subthreshold regime

S Birla, N Singh, NK Shukla, S Sharma - Bulletin of Electrical Engineering …, 2021 - beei.org
Due to the scaling of the CMOS, the limitations of these devices raised the need for
alternative nano-devices. Various devices are proposed like FinFET, TFET, CNTFET. Among …

Dual-Port 8T SRAM Cell Design with Shorted Gate FinFET for Leakage Reduction and Improved Stability

C Duari, S Birla - Intelligent Computing Techniques for Smart Energy …, 2022 - Springer
Since the CMOS technology has reached to nanometer regime to meet the increasing
demand of smarter and faster device, CMOS circuits have to face various short channel …

Real‐time bit‐line leakage balance circuit with four‐input low‐offset SA considering threshold voltage for SRAM stability design

C Peng, W Hu, H Zheng, W Lu, C Dai, X Wu… - International Journal of … - Wiley Online Library
In an SRAM, threshold voltages of transistors decrease as the CMOS process technology
scales down into the nanometer scale, which causes the leakage currents on the bit‐lines …