Architecture and process integration overview of 3D NAND flash technologies

GH Lee, S Hwang, J Yu, H Kim - Applied Sciences, 2021 - mdpi.com
In the past few decades, NAND flash memory has been one of the most successful
nonvolatile storage technologies, and it is commonly used in electronic devices because of …

Memristive and CMOS devices for neuromorphic computing

V Milo, G Malavena, C Monzio Compagnoni, D Ielmini - Materials, 2020 - mdpi.com
Neuromorphic computing has emerged as one of the most promising paradigms to
overcome the limitations of von Neumann architecture of conventional digital processors …

High-precision and linear weight updates by subnanosecond pulses in ferroelectric tunnel junction for neuro-inspired computing

Z Luo, Z Wang, Z Guan, C Ma, L Zhao, C Liu… - Nature …, 2022 - nature.com
The rapid development of neuro-inspired computing demands synaptic devices with ultrafast
speed, low power consumption, and multiple non-volatile states, among other features …

An artificial spiking afferent nerve based on Mott memristors for neurorobotics

X Zhang, Y Zhuo, Q Luo, Z Wu, R Midya, Z Wang… - Nature …, 2020 - nature.com
Neuromorphic computing based on spikes offers great potential in highly efficient computing
paradigms. Recently, several hardware implementations of spiking neural networks based …

Spiking neural networks hardware implementations and challenges: A survey

M Bouvier, A Valentian, T Mesquida… - ACM Journal on …, 2019 - dl.acm.org
Neuromorphic computing is henceforth a major research field for both academic and
industrial actors. As opposed to Von Neumann machines, brain-inspired processors aim at …

Random and Systematic Variation in Nanoscale Hf0.5Zr0.5O2 Ferroelectric FinFETs: Physical Origin and Neuromorphic Circuit Implications

S De, MA Baig, BH Qiu, F Müller, HH Le… - Frontiers in …, 2022 - frontiersin.org
This work presents 2-bits/cell operation in deeply scaled ferroelectric finFETs (Fe-finFET)
with a 1 µs write pulse of maximum±5 V amplitude and WRITE endurance above 109 cycles …

4‐bit Multilevel Operation in Overshoot Suppressed Al2O3/TiOx Resistive Random‐Access Memory Crossbar Array

S Kim, J Park, TH Kim, K Hong, Y Hwang… - Advanced Intelligent …, 2022 - Wiley Online Library
To apply resistive random‐access memory (RRAM) to the neuromorphic system and
improve performance, each cell in the array should be able to operate independently by …

Multilevel switching memristor by compliance current adjustment for off-chip training of neuromorphic system

TH Kim, S Kim, K Hong, J Park, Y Hwang… - Chaos, Solitons & …, 2021 - Elsevier
Multilevel operation is one of the most essential properties for synaptic devices to realize
hardware artificial neural networks. Compliance current (I cc) adjustment is a multilevel …

Read-optimized 28nm hkmg multibit fefet synapses for inference-engine applications

S De, F Müller, HH Le, M Lederer… - IEEE Journal of the …, 2022 - ieeexplore.ieee.org
This paper reports 2bits/cell ferroelectric FET (FeFET) devices with 500 ns write pulse of
maximum amplitude 4.5 V for inference-engine applications. FeFET devices were fabricated …

Deep-ultraviolet-triggered neuromorphic functions in In-Zn-O phototransistors

J Wang, Y Chen, LA Kong, Y Fu, Y Gao… - Applied Physics Letters, 2018 - pubs.aip.org
In recent years, photoelectronic synaptic devices have emerged as a platform for use in next-
generation neuromorphic systems and artificial neural networks (ANNs). In this paper, we …