Scaling challenges for advanced CMOS devices
The economic health of the semiconductor industry requires substantial scaling of chip
power, performance, and area with every new technology node that is ramped into …
power, performance, and area with every new technology node that is ramped into …
Multiring circular transmission line model for ultralow contact resistivity extraction
H Yu, M Schaekers, T Schram… - IEEE Electron …, 2015 - ieeexplore.ieee.org
Accurate determination of contact resistivities () below is challenging. Among the frequently
applied transmission line models (TLMs), circular TLM (CTLM) has a simple process flow …
applied transmission line models (TLMs), circular TLM (CTLM) has a simple process flow …
Characterization of low-resistance ohmic contacts to n-and p-type InGaAs
Multilayer ohmic contacts with differing first metal layers (M= Mo, Pd, Pt) beneath a Ti/Pt
diffusion barrier and Au cap were fabricated on n+ and p+-InGaAs, and the relationship …
diffusion barrier and Au cap were fabricated on n+ and p+-InGaAs, and the relationship …
Channel engineering assisted performance enhancement of metal gate sub-10nm ballistic SiNWFET for futuristic device applications
The progress in silicon technology has brought us metal oxide semiconductor (MOS)
manufacturing technologies with physical gate length of about 14 nanometers and …
manufacturing technologies with physical gate length of about 14 nanometers and …
Highly stable self-aligned Ni-InGaAs and non-self-aligned Mo contact for monolithic 3-D integration of InGaAs MOSFETs
Self-heating has emerged as an important performance/reliability challenge for modern
MOSFETs. The challenge is further acerbated for III-V transistors, especially when integrated …
MOSFETs. The challenge is further acerbated for III-V transistors, especially when integrated …
Understanding the factors affecting contact resistance in nanowire field effect transistors (NWFETs) to improve nanoscale contacts for future scaling
S Ramesh, T Ivanov, A Sibaja-Hernandez… - Journal of Applied …, 2022 - pubs.aip.org
In this paper, dry etched vertical nanowires (VNWs) are used in transmission line/transfer
length analysis to study the contacts of gate-all-around devices for future technology nodes …
length analysis to study the contacts of gate-all-around devices for future technology nodes …
Size and orientation effects on the kinetics and structure of nickelide contacts to InGaAs fin structures
The rapid development of ultrascaled III–V compound semiconductor devices urges the
detailed investigation of metal–semiconductor contacts at nanoscale where crystal …
detailed investigation of metal–semiconductor contacts at nanoscale where crystal …
Nanoscale metal-InGaAs contacts with ultra-low specific contact resistivity: Improved interfacial quality and extraction methodology
Nanoscale metal-InGaAs contacts with ultra-low specific contact resistivity: Improved interfacial
quality and extraction methodology | Journal of Applied Physics | AIP Publishing Skip to Main …
quality and extraction methodology | Journal of Applied Physics | AIP Publishing Skip to Main …
Elimination of the parasitic metal resistance in transmission line model for extraction of ultralow specific contact resistivity
A metal-resistance-aware transmission line model (MRA-TLM) is developed to eliminate the
parasitic metal resistance from the extraction of specific contact resistivity Pc in the …
parasitic metal resistance from the extraction of specific contact resistivity Pc in the …
Growth of catalyst-free epitaxial InAs nanowires on Si wafers using metallic masks
Development of heteroepitaxy growth of catalyst-free vertical III–V nanowires on Si wafers is
highly desirable for future nanoscale Si-based electronic and optoelectronic devices. In this …
highly desirable for future nanoscale Si-based electronic and optoelectronic devices. In this …