Advanced Structural and Semi-Formal Verification Flow for Clock Domain Crossing (CDC) in Asynchronous Multiclock Systems
D Kalel - 2024 - theses.hal.science
During my PhD, we focused on improving the verification of asynchronous interfaceson multi-
clock systems. Our mission was to optimize Clock Domain Crossing (CDC) verification on …
clock systems. Our mission was to optimize Clock Domain Crossing (CDC) verification on …
Enhancing ASIC Design Efficiency: A Focus on RTL Verification with Spyglass
D Fichadia, N Shah, B Soni - International Conference on Computing …, 2024 - Springer
In today's modern world, the number of transistors on a chip is increasing, leading to
heightened circuit complexity. Consequently, careful consideration is essential during the …
heightened circuit complexity. Consequently, careful consideration is essential during the …
Estimation of SoC Testability at Early RTL Stage
A Swetha Priya, S Kamatchi… - … Manufacturing and Energy …, 2023 - Springer
Abstract Silicon-on-Chip (SoC) challenges are long-standing paradigm of exponentially
increasing complexity of design process. Push towards smaller feature size has been a …
increasing complexity of design process. Push towards smaller feature size has been a …
[引用][C] METHODOLOGY TO HANDLE THE CHALLENGES IN CLOCK DOMAIN CROSSINGS FOR LPDDR4 PHY
S KUMAR - 2021 - NATIONAL INSTITUTE OF …