[图书][B] Continuous-time sigma-delta A/D conversion: fundamentals, performance limits and robust implementations

F Gerfers, M Ortmanns - 2006 - books.google.com
Sigma-delta A/D converters are a key building block in wireless and multimedia
applications. This comprehensive book deals with all relevant aspects arising during the …

A 2.7-mW 2-MHz Continuous-Time Modulator With a Hybrid Active–Passive Loop Filter

T Song, Z Cao, S Yan - IEEE Journal of Solid-State Circuits, 2008 - ieeexplore.ieee.org
In this paper, passive continuous-time (CT) Sigma Delta modulators are briefly reviewed and
compared with conventional active CT Sigma Delta modulators. A fifth-order CT Sigma Delta …

A Built-In Self-Test and In Situ Analog Circuit Optimization Platform

S Lee, C Shi, J Wang, A Sanabria… - … on Circuits and …, 2018 - ieeexplore.ieee.org
In this paper, a built-in self-test and in situ analog circuit optimization platform is proposed
and characterized. By integrating a fully digital optimization engine and self-test circuits …

An inverter-based continuous time sigma delta ADC with latency-free DAC calibration

Y Guo, J Jin, X Liu, J Zhou - … on Circuits and Systems I: Regular …, 2020 - ieeexplore.ieee.org
This paper presents a wide bandwidth inverter-based continuous time sigma delta (CTSD)
analog-to-digital converter (ADC) with a latency-free calibration to suppress the nonlinearity …

A 780–950 MHz, 64–146 µW power-scalable synchronized-switching ook receiver for wireless event-driven applications

XC Huang, P Harpe, G Dolmans… - IEEE Journal of Solid …, 2014 - ieeexplore.ieee.org
An on/off keying receiver has been designed in 90 nm CMOS for low-power event-driven
applications. Thanks to the synchronized-switching technique and power-efficient RF gain …

Design and analysis of the leapfrog control-bounded A/D converter

F Feyling, H Malmberg, C Wulff… - … Transactions on Very …, 2023 - ieeexplore.ieee.org
This article presents analytical tools for high-level design of the leapfrog (LF) control-
bounded analog-to-digital converter (CBADC). We derive closed-form design equations for …

Background DAC error estimation using a pseudo random noise based correlation technique for sigma-delta analog-to-digital converters

P Witte, M Ortmanns - … Transactions on Circuits and Systems I …, 2010 - ieeexplore.ieee.org
This paper presents a new approach for estimating non-idealities in unit element feedback
digital-to-analog converters of Sigma-Delta analog-to-digital converters. The presented …

A 0.85mm2 BLE Transceiver Using an On-Chip Harmonic-Suppressed RFIO Circuitry With T/R Switch

Z Sun, H Liu, H Huang, D Tang, D Xu… - … on Circuits and …, 2020 - ieeexplore.ieee.org
This article presents a small-area Bluetooth Low-Energy (BLE) transceiver (TRX) for short-
range Internet-of-Things (IoT) applications in 65-nm CMOS. An integrated Radio-Frequency …

Design of adaptive multimode RF front-end circuits

A Tasic, ST Lim, WA Serdijn… - IEEE Journal of Solid …, 2007 - ieeexplore.ieee.org
Migration towards higher data rates and higher capacities for multimedia applications, and
provision of various services (text, audio, video) from different wireless standards with the …

High-level comparison of control-bounded A/D converters and continuous-time sigma-delta modulators

F Feyling, H Malmberg, C Wulff… - 2022 IEEE Nordic …, 2022 - ieeexplore.ieee.org
In this paper, behavioural circuit simulations are used to compare the leapfrog control-
bounded analog-to-digital converter to relevant continuous-time sigma-delta modulators in …