We develop a new intermediate weak memory model, IMM, as a way of modularizing the
proofs of correctness of compilation from concurrent programming languages with weak …

We present a framework called Composable Modular Design (CMD) to facilitate the design
of out-of-order (OOO) processors. In CMD,(1) The interface methods of modules provide …

This study represents an attempt to test Braithwaite's theory of reintegrative shaming with an
operationalization scheme of two variables—disapproval of delinquent behavior (shaming) …

Currently, there are two representative non-volatile dual in-line memory module (NVDIMM)
interfaces: a proprietary Intel DDR-T and the JEDEC NVDIMM-P, which are not supported by …

The template-based chip design method aims to build rapidly. However, it still need
synthesis and simulation flows to get the performance, power, and area (PPA) reports and …

This article introduces turn-based spatiotemporal coherence. Spatiotemporal coherence is a
novel coherence implementation that assigns write permission to epochs (or turns) as …

Sequential consistency (SC) is the most intuitive memory consistency model and the easiest
for programmers and hardware designers to reason about. However, the strict memory …

Modern SoCs are heterogeneous parallel systems comprised of components developed by
distinct teams and possibly even different vendors. The memory consistency model (MCM) …

Since the introduction of the CDC 6600 in 1965 and itsscoreboarding'technique processors
have not (necessarily) executed instructions in program order. Programmers of high-level …

Since the early 70s, simulation infrastructures have been a keystone in computer
architecture research, providing a fast and reliable way to prototype and evaluate ideas for …