Design and compare the HA and FA circuits using Gate Diffusion Input (GDI) technique based on 18 nm FinFET technology for improved power efficiency and …

G Rana, K Sharma - 2023 IEEE 2nd International Conference …, 2023 - ieeexplore.ieee.org
The most significant challenge in designing adders using the gate diffusion input (GDI)
technology is minimizing the anticipated area, power consumption, and propagation delay …

Late Breaking Results: Single Flux Quantum Based Brownian Circuits for Ultra-Law-Power Computing

S Kawakami, Y Ohtusbo, K Inoue… - … Design, Automation & …, 2024 - ieeexplore.ieee.org
This paper proposes a random walk circuit imple-mentation with single flux quantum
devices, essential for Brownian circuits, to reduce processing energy consumption …

A high-speed, low-power, and area-efficient FGMOS-based full adder

R Gupta, R Gupta, S Sharma - IETE Journal of Research, 2022 - Taylor & Francis
Full adder is one of the fundamental components of very large-scale digital integrated
systems, capable of performing all arithmetic operations. High-performance full adders are …

A comparative analysis of 8-bit novel adder architecture design using traditional cmos and m-gdi technique

G Nayan - … on Communication and Electronics Systems (ICCES …, 2019 - ieeexplore.ieee.org
Addition is a standout amongst the most fundamental operations in VLSI frameworks such
as microprocessors and digital signal processing systems. Therefore, the adders must …

Design of a Low-Power 4x4 Wallace Tree Multiplier Using Ripple Carry Adder at 10 MHz in 180nm CMOS Techology

PNL Balatero, JJ Galang… - 2024 23rd …, 2024 - ieeexplore.ieee.org
The research focused on designing a low-power 4x4 Wallace Tree Multiplier for integration
into wearable devices, driven by the growing prevalence of wearable technology and the …

A review on modified gate diffusion input logic: an approach for area and power efficient digital system design

G Nayan, RK Prasad, PK YG… - Proceedings of the …, 2019 - papers.ssrn.com
In recent days, the main motto of VLSI designers is to reduce the power and area as devices
are becoming battery-operated, compact and require enhanced functionality and features …

Study of Area-delay and Energy Efficient Multi-operand Binary Tree Adder

K Jyoti Singh, M Kumar - VLSI, Microwave and Wireless Technologies …, 2022 - Springer
The study of construction of various multi-operand adders is portrayed in this article. The
power dissipation and propagation delay of various multi-operand adders are evaluated …

Theoretical and Experimental Investigations of the Dynamics of Axially Loaded-Microstructures with Exploitation for MEMS Resonator-Based Logic Devices

SA Tella - 2021 - repository.kaust.edu.sa
In line with the rising demand for smarter solutions and embedded systems,
Microelectromechanical systems (MEMS) have gained increasing importance for digital …

Emulation Technique in Digital Systems Design

I Obiora-Dimson, H Inyiama… - NIPES-Journal of Science …, 2023 - journals.nipes.org
The need for emulation as a technique in digital systems design was established in this
paper. Three scenarios where emulation can be applied were stated. To successfully …

Design and analysis of CLA with Hybrid and GDI Techniques

K Praveen - 2021 5th International Conference on Trends in …, 2021 - ieeexplore.ieee.org
Currently, two logic styles are available to implement CLA, they are conventional design
method and proposed design method. When compared to both, the hybrid design style is …