Bingo spatial data prefetcher

M Bakhshalipour, M Shakerinava… - … Symposium on High …, 2019 - ieeexplore.ieee.org
Applications extensively use data objects with a regular and fixed layout, which leads to the
recurrence of access patterns over memory regions. Spatial data prefetching techniques …

Evaluation of hardware data prefetchers on server processors

M Bakhshalipour, S Tabaeiaghdaei… - ACM Computing …, 2019 - dl.acm.org
Data prefetching, ie, the act of predicting an application's future memory accesses and
fetching those that are not in the on-chip caches, is a well-known and widely used approach …

[PDF][PDF] Multi-lookahead offset prefetching

M Shakerinava… - The Third Data …, 2019 - dpc3.compas.cs.stonybrook.edu
Offset prefetching has been recently proposed as a lowoverhead yet high-performance
approach to eliminate data cache misses or reduce their negative effect. In offset …

Reducing writebacks through in-cache displacement

M Bakhshalipour, A Faraji, SAV Ghahani… - ACM Transactions on …, 2019 - dl.acm.org
Non-Volatile Memory (NVM) technology is a promising solution to fulfill the ever-growing
need for higher capacity in the main memory of modern systems. Despite having many great …

Trimma: Trimming Metadata Storage and Latency for Hybrid Memory Systems

Y Li, B Tian, M Gao - Proceedings of the 2024 International Conference …, 2024 - dl.acm.org
Hybrid main memory systems combine both performance and capacity advantages from
heterogeneous memory technologies. With larger capacities, higher associativities, and finer …

Blenda: Dynamically-Reconfigurable Stacked DRAM

M Bakhshalipour, H Zare, F Samandi… - 2024 57th IEEE/ACM …, 2024 - ieeexplore.ieee.org
This paper proposes Blenda, a dynamically-partitioned memory-cache blend architecture for
giga-scale die-stacked DRAMs. Blenda architects the stacked DRAM partly as memory and …

A survey on recent hardware data prefetching approaches with an emphasis on servers

M Bakhshalipour, M Shakerinava, F Golshan… - arXiv preprint arXiv …, 2020 - arxiv.org
Data prefetching, ie, the act of predicting application's future memory accesses and fetching
those that are not in the on-chip caches, is a well-known and widely-used approach to hide …

Mana: Microarchitecting an instruction prefetcher

A Ansari, F Golshan, P Lotfi-Kamran… - arXiv preprint arXiv …, 2021 - arxiv.org
L1 instruction (L1-I) cache misses are a source of performance bottleneck. Sequential
prefetchers are simple solutions to mitigate this problem; however, prior work has shown that …

Line-coalescing dram cache

Q Zhang, X Sui, R Hou, L Zhang - Sustainable Computing: Informatics and …, 2021 - Elsevier
Die-stacked DRAM has emerged as an effective approach to address the memory
bandwidth wall as it offers much higher bandwidth than off-chip DRAM. It is typically used …

[PDF][PDF] Evaluation of Hardware Data Prefetchers on Server Processors

P LOTFI-KAMRAN, H SARBAZI-AZAD - 2019 - cs.ipm.ac.ir
Server workloads like Media Streaming and Web Search serve millions of users and are
considered an important class of applications. Such workloads run on large-scale data …