Optimal parameter design for IC wire bonding process by using fuzzy logic and Taguchi method

JT Tsai, CC Chang, WP Chen, JH Chou - IEEE Access, 2016 - ieeexplore.ieee.org
Fuzzy logic Taguchi method (FLTM) is used to optimize parameters for wire bonding
process. The proposed FLTM integrates orthogonal arrays, signal-to-noise ratios, response …

Experimental insights into thermal dissipation in TSV-based 3D integrated circuits

P Coudrain, P Souare, JP Colonna, P Vivet… - IEEE Design & Test of …, 2016 - computer.org
This paper provides an overview of recent achievements on 3D thermal management
obtained at CEA-Leti and STMicroelectronics. We present new insights into thermal …

Dimension Influence on the Interface Fatigue Characteristics of Three-Dimensional TSV Array: A Fully Coupled Thermal-Electrical-Structural Analysis

K Hou, Z Fan, S Zhang, Y Wang… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
As the interconnected structure of 3D chip, through. silicon via undertakes the key functions
in energy transmission, mechanical support and signal transmission of 3D chip. With the …

Thermal modeling and model validation for 3D stacked ICs

H Oprins, F Maggioni, V Cherman… - Handbook of 3D …, 2019 - Wiley Online Library
This chapter first introduces different modeling techniques with varying flexibility and
complexity to be used at different stages of the design flow, ranging from fast‐solving …

Thermal measurements on flip-chipped system-on-chip packages with heat spreader integration

R Prieto, JP Colonna, P Coudrain… - 2015 31st Thermal …, 2015 - ieeexplore.ieee.org
Amongst the cooling solutions proposed to mitigate heat hazard effects in microelectronics,
heat spreaders seem to be one of the most suitable when thickness and space constraints …

Effectiveness of thermal redistribution layer in cooling of 3D ICs

F Wang, Y Li, N Yu, Y Yang - International Journal of Numerical …, 2021 - Wiley Online Library
A cooling system composed of a thermal redistribution layer (TRDL) and a thermal through‐
silicon via (TTSV) is proposed for three‐dimensional integrated circuits (3D ICs). According …

Electrical models of through silicon Vias and silicon‐based devices for millimeter‐wave application

X Liu, Z Zhu, Y Yang, Y Liu, Q Lu… - International Journal of …, 2018 - Wiley Online Library
As the short vertical interconnections can significantly shorten the interconnect length
between different circuits, three‐dimensional integrated circuits (3D ICs) based on the …

A comprehensive platform for thermal studies in TSV-based 3D integrated circuits

PM Souare, P Coudrain, JP Colonna… - 2014 IEEE …, 2014 - ieeexplore.ieee.org
We present an advanced and comprehensive platform for thermal dissipation studies in TSV-
based 3D ICs. A 2-tier 3D test chip with through silicon via (TSV) and μ-bump is used for …

[PDF][PDF] Analytical Heat Transfer Model for a TTSVs-based Thermal Mitigation Power Chip

Y Wang, F Yang, K Ma - Journal of Semiconductor Technology and …, 2021 - journal.auric.kr
The work develops an analytical thermal model for a thermal Through Silicon Vias based
heat mitigation power chip whose thermal path is quite different compared to the literatures …

Assessment of a heat spreading solution for hot spots cooling in compact packages

R Prieto, G Belly, JP Colonna… - … Investigations of ICs …, 2014 - ieeexplore.ieee.org
Heat generation in integrated circuits has become in few decades one of the most limiting
factors for performance improvement in mobile device components, such as cell phones or …