Dramatic improvements in SAT solver technology over the last decade and the growing
need for more efficient and scalable verification solutions have fueled research in …

We describe the design and implementation of SATORI-a fast sequential justification engine
based on state-of-the-art SAT and ATPG techniques. We present several novel techniques …

Distance learning has gained in popularity not only as a way to offer instruction in locations
without local expertise, but also as a cost-effective method where limited enrolment at one …

This paper develops a novel approach for formally verifying both safety and liveness
properties of designs using sequential ATPG tools. The properties are automatically mapped …

Industry is beginning to use Satisfiability (SAT) solvers extensively for formally verifying the
correctness of digital designs. In this paper we compare the performance of SAT solvers with …

Due to the use of scaled technologies, high levels of integration and high speeds of today's
mixed-signal SoCs, the problem of validating correct operation of the SoC under electrical …

In this work we investigate the integration of SAT methods into a simulation-based
sequential ATPG tool, STRATEGATE, with the aim of improving the state-of-the-art in …

Current computing platforms become more and more complex for users to use. To simplify
configuration and deployment of applications on these infrastructures tools are necessary …

This paper presents a formal verification algorithm using the Petri Net theory to detect design
errors for high-level synthesis of dataflow algorithms. Typically, given a dataflow algorithm …

Computing image/preimage is a fundamental step in formal verification of hardware
systems. Conventional OBDD-based methods for formal verification suffer from spatial …