New approach to look-up-table design and memory-based realization of FIR digital filter

PK Meher - IEEE Transactions on Circuits and Systems I …, 2009 - ieeexplore.ieee.org
Distributed arithmetic (DA)-based computation is popular for its potential for efficient memory-
based implementation of finite impulse response (FIR) filter where the filter outputs are …

An overview of systolic arrays for forward and inverse discrete sine transforms and their exploitation in view of an improved approach

DF Chiper, A Cracan, VD Andries - Electronics, 2022 - mdpi.com
This paper aims to present a unified overview of the main Very Large-Scale Integration
(VLSI) implementation solutions of forward and inverse discrete sine transforms using …

Low-power VLSI architectures for DCT\/DWT: precision vs approximation for HD video, biomedical, and smart antenna applications

A Madanayake, RJ Cintra, V Dimitrov… - IEEE Circuits and …, 2015 - ieeexplore.ieee.org
The DCT and the DWT are used in a number of emerging DSP applications, such as, HD
video compression, biomedical imaging, and smart antenna beamformers for wireless …

LUT optimization for memory-based computation

PK Meher - IEEE Transactions on Circuits and Systems II …, 2010 - ieeexplore.ieee.org
Recently, we have proposed the antisymmetric product coding (APC) and odd-multiple-
storage (OMS) techniques for lookup-table (LUT) design for memory-based multipliers to be …

Systolic designs for DCT using a low-complexity concurrent convolutional formulation

PK Meher - IEEE transactions on circuits and systems for video …, 2006 - ieeexplore.ieee.org
A reduced-complexity convolutional formulation is presented for systolic implementation of
the discrete cosine transform, where N-point transform can be computed by four numbers of …

A Row-Parallel 88 2-D DCT Architecture Using Algebraic Integer-Based Exact Computation

A Madanayake, RJ Cintra, D Onen… - IEEE transactions on …, 2011 - ieeexplore.ieee.org
An algebraic integer (AI)-based time-multiplexed row-parallel architecture and two final
reconstruction step (FRS) algorithms are proposed for the implementation of bivariate AI …

New approach to LUT implementation and accumulation for memory-based multiplication

PK Meher - 2009 IEEE International Symposium on Circuits …, 2009 - ieeexplore.ieee.org
A new approach to look-up-table (LUT) implementation for memory-based multiplication is
presented, where the memory-size is reduced to half at the cost of some increase in …

New look-up-table optimizations for memory-based multiplication

PK Meher - Proceedings of the 2009 12th International …, 2009 - ieeexplore.ieee.org
Two new techniques are presented in this paper, for the reduction of look-up-table (LUT)
size of memory-based multipliers to be used in digital signal processing applications. It is …

New systolic algorithm and array architecture for prime-length discrete sine transform

PK Meher, MNS Swamy - … on Circuits and Systems II: Express …, 2007 - ieeexplore.ieee.org
Using a simple input-regeneration approach and index-transformation techniques, a new
formulation is presented in this paper for computing an N-point prime-length discrete sine …

A high-speed 2-D transform architecture with unique kernel for multi-standard video applications

CY Huang, LF Chen, YK Lai - 2008 IEEE International …, 2008 - ieeexplore.ieee.org
In this paper, a high-speed two-dimensional (2-D) transform architecture with unique kernel
for multi-standard video applications is proposed. On the basis of the new distributed …