High-frequency scalable electrical model and analysis of a through silicon via (TSV)

J Kim, JS Pak, J Cho, E Song, J Cho… - IEEE Transactions …, 2011 - ieeexplore.ieee.org
We propose a high-frequency scalable electrical model of a through silicon via (TSV). The
proposed model includes not only the TSV, but also the bump and the redistribution layer …

High-frequency modeling of TSVs for 3-D chip integration and silicon interposers considering skin-effect, dielectric quasi-TEM and slow-wave modes

I Ndip, B Curran, K Lobbicke… - IEEE transactions on …, 2011 - ieeexplore.ieee.org
Through-silicon vias (TSVs) in low, medium and high resistivity silicon for 3-D chip
integration and interposers are modeled and thoroughly characterized from 100 MHz to 130 …

TSV open defects in 3D integrated circuits: Characterization, test, and optimal spare allocation

F Ye, K Chakrabarty - Proceedings of the 49th Annual Design …, 2012 - dl.acm.org
Three-dimensional integration based on die/wafer stacking and through-silicon-vias (TSVs)
promises to overcome interconnect bottlenecks for nanoscale integrated circuits (ICs) …

Electromagnetic modeling of through-silicon via (TSV) interconnections using cylindrical modal basis functions

KJ Han, M Swaminathan… - IEEE Transactions on …, 2010 - ieeexplore.ieee.org
This paper proposes an efficient method to model through-silicon via (TSV)
interconnections, an essential building block for the realization of silicon-based 3-D systems …

Analysis and optimization of sidewall roughness on microwave performance of through-glass vias in 3-D integrated circuits

Z Fang, J Zhang, J Liu, H Chen, L Gao… - IEEE Transactions …, 2023 - ieeexplore.ieee.org
The integrity and reliability of signal transmission in glass 3-D integrated circuits (ICs) can be
improved by studying the effect of sidewall roughness of through-glass vias (TGVs) on …

Analytical, numerical-, and measurement–based methods for extracting the electrical parameters of through silicon vias (TSVs)

I Ndip, K Zoschke, K Löbbicke, MJ Wolf… - IEEE Transactions …, 2013 - ieeexplore.ieee.org
In this paper, analytical, numerical-, and measurement-based methods for extracting the
resistance, inductance, capacitance, and conductance of through silicon vias (TSVs) are …

A study of tapered 3-D TSVs for power and thermal integrity

A Todri, S Kundu, P Girard, A Bosio… - … Transactions on Very …, 2012 - ieeexplore.ieee.org
3-D integration presents a path to higher performance, greater density, increased
functionality and heterogeneous technology implementation. However, 3-D integration …

Through-silicon-via fabrication technologies, passives extraction, and electrical modeling for 3-D integration/packaging

Z Xu, JQ Lu - IEEE Transactions on Semiconductor …, 2012 - ieeexplore.ieee.org
Major advances have been made in the processing technologies of through-silicon-vias
(TSVs) because TSV is an essential element for both wafer-level 3-D integration and …

System and method for modeling through silicon via

HT Yen, YL Lin, CW Kuo - US Patent 9,633,149, 2017 - Google Patents
BACKGROUND Integrated circuits (“ICs”) are incorporated into many electronic devices. IC
packaging has evolved, such that multiple ICs may be vertically stacked in so-called three …

Frequency-and temperature-dependent modeling of coaxial through-silicon vias for 3-D ICs

WS Zhao, WY Yin, XP Wang… - IEEE transactions on …, 2011 - ieeexplore.ieee.org
Temperature-dependent investigations of circular and square coaxial through-silicon vias (C-
TSVs) are carried out in this paper, which can provide an effective solution to suppressing …