With the increasing demand for high performance computing in application domains with
stringent power budgets, coarse-grained reconfigurable array (CGRA) architectures have …

Many multiprocessor list scheduling heuristics that account for interprocessor
communication delay have been proposed in recent years. However, no uniform …

Due to their flexibility and high performance, Coarse Grained Reconfigurable Array (CGRA)
are a topic of increasing research interest. However, CGRAs also have the potential to …

With the increase in the design complexity of MPSoC architectures, estimating power
consumption is very complex and time consuming at lower level of abstraction. We propose …

Schedulers for real-time distributed replicated databases must satisfy two requirements:
transactions should meet their timing constraints, and mutual consistency of replicated data …

Research interest and industry investment in edge computing solutions have increased
dramatically in recent years. Consequent quest for balanced performance, energy efficiency …

Multimedia applications have become increasingly important in daily computing. These
applications are composed of heterogeneous regions of code mixed with data-level …

Pipelined execution is one of the most important optimizations in hardware design to
improve hardware utilization rate, and hence the throughput. Loop pipelining is a …

The saturation of design complexity and clock frequencies for single-core processors has
resulted in the emergence of multicore architectures as an alternative design paradigm …

With the increase in the design complexity of MP-SoC architectures, flexible and accurate
processor simulators became a necessity for exploring the vast design space solutions. In …