Threshold voltage variability in nanosheet GAA transistors
PH Vardhan, S Ganguly… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
Nanosheet gate-all-around (GAA) field-effect transistor (NSFET) is a potential replacement
for the FinFET at advanced technology nodes owing to better control of short-channel effects …
for the FinFET at advanced technology nodes owing to better control of short-channel effects …
Alternative threshold voltage scheme via direct metal gate patterning for high performance CMOS FinFETs
R Bao, SA Krishnan, U Kwon, KKH Wong - US Patent 9,553,092, 2017 - Google Patents
Multiple gate stack portions are formed in a gate cavity by direct metal gate patterning to
provide FinFETs having different threshold voltages. The different threshold voltages are …
provide FinFETs having different threshold voltages. The different threshold voltages are …
Techniques for metal gate work function engineering to enable multiple threshold voltage nanowire FET devices
JB Chang, I Lauer, CH Lin, JW Sleight - US Patent 8,658,518, 2014 - Google Patents
A method of fabricating a nanowire FET device includes the following steps. A SOI wafer is
provided having a SOI layer over a BOX. Nanowires and pads are etched in the SOI layer …
provided having a SOI layer over a BOX. Nanowires and pads are etched in the SOI layer …
Techniques for metal gate workfunction engineering to enable multiple threshold voltage FINFET devices
JB Chang, I Lauer, CH Lin, JW Sleight - US Patent 8,669,167, 2014 - Google Patents
The present invention provides techniques for gate work function engineering in FIN field-
effect transistor (FET) devices using a work function setting material an amount of which is …
effect transistor (FET) devices using a work function setting material an amount of which is …
Design of poly-Si junctionless fin-channel FET with quantum-mechanical drift-diffusion models for sub-10-nm technology nodes
J Lee, Y Kim, S Cho - IEEE Transactions on Electron Devices, 2016 - ieeexplore.ieee.org
In this paper, a junctionless FinFET (JLFinFET) having polycrystalline-silicon (poly-Si)
channel has been optimally designed and characterized by stringent device simulation …
channel has been optimally designed and characterized by stringent device simulation …
Techniques for metal gate workfunction engineering to enable multiple threshold voltage FINFET devices
JB Chang, I Lauer, CH Lin, JW Sleight - US Patent 8,669,615, 2014 - Google Patents
The present invention provides techniques for gate work function engineering in FIN field-
effect transistor (FET) devices using a work function setting material an amount of which is …
effect transistor (FET) devices using a work function setting material an amount of which is …
Gate-First Integration of Tunable Work Function Metal Gates of Different Thicknesses Into High-/Metal Gates CMOS FinFETs for Multi- Engineering
MM Hussain, CE Smith, HR Harris… - IEEE transactions on …, 2010 - ieeexplore.ieee.org
Gate-first integration of tunable work function metal gates of different thicknesses (3-20 nm)
into high-k/metal gates CMOS FinFETs was demonstrated to achieve multiple threshold …
into high-k/metal gates CMOS FinFETs was demonstrated to achieve multiple threshold …
Method of forming multi-threshold voltage devices using dipole-high dielectric constant combinations and devices so formed
WE Wang - US Patent 10,770,353, 2020 - Google Patents
US10770353B2 - Method of forming multi-threshold voltage devices using dipole-high dielectric
constant combinations and devices so formed - Google Patents US10770353B2 - Method of …
constant combinations and devices so formed - Google Patents US10770353B2 - Method of …
Replacement metal gate structure for CMOS device
BACKGROUND The exemplary embodiments relate to a manufacturing process for
replacement metal gate CMOS devices and, more particularly, relate to a simpler …
replacement metal gate CMOS devices and, more particularly, relate to a simpler …
Alternative threshold voltage scheme via direct metal gate patterning for high performance CMOS FinFETs
R Bao, SA Krishnan, U Kwon, KKH Wong - US Patent 9,905,476, 2018 - Google Patents
Multiple gate stack portions are formed in a gate cavity by direct metal gate patterning to
provide FinFETs having different threshold voltages. The different threshold voltages are …
provide FinFETs having different threshold voltages. The different threshold voltages are …