Extreme bottom-up copper superfilling of through-silicon-vias (TSV) is demonstrated using a
CuSO 4-H 2 SO 4 electroplating bath containing chloride and a polyether suppressor. Via …

As a powerful enabling technology, three-dimensional (3D) integration, which uses wafer
bonding to integrate multiple wafers in the vertical direction and uses through‑silicon-vias …

Copper‐plated interconnects were widely adopted for volume manufacture of integrated
circuits after more than a decade of intensive research to demonstrate that use of Cu would …

Through-silicon vias (TSVs) are a critical technology for three-dimensional integrated circuit
technology. These through-substrate interconnects allow electronic devices to be stacked …

A model for copper electroplating of through-silicon vias (TSV) is proposed based on the
suppressor adsorption/desorption mechanism, with special emphasis on the bottom-up …

Extreme bottom-up superfilling of annular through-silicon-vias (TSV) during copper
electrodeposition has been reported wherein metal deposits on the bottom surface of the …

Abstract Through Silicon Via (TSV) technology is essential to accomplish 3-dimensional
packaging of electronics. Hence, more reliable and faster TSV filling by Cu electrodeposition …

The evolution of superconformal Cu electrodeposition in high aspect ratio through silicon
vias (TSVs) is examined as a function of polymer suppressor concentration, applied …

Microvia filling of a printed circuit board by acidic copper electroplating was performed to
evaluate whether the filling performance of an acidic copper plating solution could be …

The microstructural evolution of Cu through-silicon vias (TSVs) during thermal annealing
was investigated by analyzing the Cu microstructure and the effects of twin boundaries and …