H Dhotre, S Eggersglüß… - 2017 IEEE 26th Asian Test …, 2017 - ieeexplore.ieee.org
With the increase in transistor density in state-of-the-art circuits the power behavior of integrated circuits changes drastically, which may result in device failures. This may become …
P Ghosal, H Rahaman… - … Conference on Advances …, 2010 - ieeexplore.ieee.org
Dominance of on-chip power densities has become a critical design constraint in high- performance VLSI design. This is primarily due to increased technology scaling, number of …
S Das, S Ghosh, P Dasgupta, S Sensarma - 2015 - ir.iimcal.ac.in
Minimization of power dissipation of VLSI circuits is one of the major concerns of recent digital circuit design primarily due to the ever decreasing feature sizes of circuits, higher …
S Das, P Dasgupta, P Fiser, S Ghosh… - 2016 IEEE 19th …, 2016 - ieeexplore.ieee.org
Minimization of power dissipation of VLSI circuits is one of the major concerns of recent digital circuit design primarily due to the ever decreasing feature sizes of circuits, higher …
D Roy, P Ghosal - … Conference on Fuzzy Systems (FUZZ-IEEE), 2013 - ieeexplore.ieee.org
In DSM (deep sub-micron) regime, together with the integration density interconnects play a dominant role during layout design of integrated circuits. It eventually increases the …
D Roy, P Ghosal, N Das - Proceedings of the 2014 IEEE …, 2014 - ieeexplore.ieee.org
During recent days, the large problem space of very large scale integrated (VLSI) circuits has led global routing problem to a NP Complete one. With the advent of three dimensional …
M Sadri, A Bartolini, L Benini - Integration, 2015 - Elsevier
Thermal effects are rapidly gaining importance in nanometer CMOS technologies. Increased power density, coupled with spatio-temporal variability of chip workloads, causes on-die …
P Ghosal, H Rahaman, P Dasgupta - … of the 13th IEEE/VSI VLSI …, 2009 - researchgate.net
In high-performance VLSI circuits, the on-chip power densities are playing dominant role in both static and dynamic conditions due to increased scaling of technology, increasing …
The high integration density interconnects, closerproximity of modules, and the routing phase are pivotal during the layout of 3D ICs. Heuristic based approaches are typically used …